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5. A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW.

Author

Hoeju Chung, Byung-Hoon Jeong, ByungJun Min, Youngdon Choi, Beak-Hyung Cho, Junho Shin, Jinyoung Kim, Jung Sunwoo, Joon-min Park, Qi Wang, Yong-jun Lee, Sooho Cha, Dukmin Kwon, Sang-Tae Kim, Sunghoon Kim 0001, Yoohwan Rho, Mu-Hui Park, Jaewhan Kim, Ickhyun Song, Sunghyun Jun, Jaewook Lee, KiSeung Kim, Ki-won Lim, Won-ryul Chung, ChangHan Choi, HoGeun Cho, Inchul Shin, Woochul Jun, Seokwon Hwang, Ki-Whan Song, KwangJin Lee, Sang-whan Chang, Woo-Yeong Cho, Jei-Hwan Yoo, and Young-Hyun Jun

Published
2011
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6. A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW

Author

Sung-Hoon Kim, Yong-Jun Lee, Byung-Hoon Jeong, Sang-Tae Kim, Jung Sunwoo, HoGeun Cho, Jin-Young Kim, Sunghyun Jun, Inchul Shin, Hoe-ju Chung, Woo-Yeong Cho, Jae-Wook Lee, Woochul Jun, Jun-Ho Shin, Joon-Min Park, Chang-han Choi, Qi Wang, Young-don Choi, Young-Hyun Jun, Ki-whan Song, Byung-Jun Min, KiSeung Kim, Jei-Hwan Yoo, Mu-Hui Park, Yoohwan Rho, Won-Ryul Chung, Seok-Won Hwang, Sang-whan Chang, Ickhyun Song, Ki-won Lim, Beak-Hyung Cho, Kwang-Jin Lee, Sooho Cha, Jaewhan Kim, and Duk-Min Kwon

Subjects
Non-volatile memory, Random access memory, Hardware_MEMORYSTRUCTURES, Computer science, Low-power electronics, Scalability, Parallel computing, Flash memory
Abstract

In mobile systems, the demand for the energy saving continues to require a low power memory sub-system. During the last decade, the floating-gate flash memory has been an indispensable low power memory solution. However, NOR flash memory has begun to show difficulties in scaling due to the device's reliability and yield issues. Over the past few years, phase-change random access memory (PRAM) has emerged as an alternative non-volatile memory (NVM) owing to its promising scalability and low cost process [1,2]. In this paper, a PRAM, implemented in a 58nm PRAM process with a low power double-data-rate nonvolatile memory (LPDDR2-N) interface, is presented [3].

Published
2011

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