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This brief presents a monolithically integrated fully differential linear HV amplifier as the driver of an ultrasonic transducer. The linear amplifier is capable of transmitting HV arbitrary signals with a very low harmonic distortion, which is suitable for tissue harmonic imaging and other ultrasonic modes for enhanced imaging quality. The amplifier is designed and implemented using the 0.7-μm CMOS silicon-on-insulator process with 120-V devices. The amplifier, when driving a load of 300 pF in parallel with 100 Ω, is capable of transmitting a sine-wave signal with a frequency of up to 4.4 MHz, a maximum signal swing of 180 Vpp, and a second-order harmonic distortion (HD2) of −56 dBc but only dissipating an average power of 62 mW with a 0.1% duty cycle.

The x ray energy loss out of laser-heated hohlraum through laser entrance holes (LEH) is discussed in detail according to a simple theoretical model and is compared with the hohlraum experimental data measured at Shenguang II laser facility. The radiation loss is considered to be composed of two parts, that is, direct contribution from laser spots and re-emitted part from the x ray-heated hohlraum inner wall, and the former accounts for about 20% of the total loss for the Shenguang II hohlraums. Owing to the non-equilibrium characteristics of laser target coupling the direct contribution part is non-equilibrium in spectrum.

This paper describes a fast digital calibration scheme for pipelined analog-to-digital converters (ADCs). The proposed method corrects the nonlinearity caused by finite opamp gain and capacitor mismatch in multiplying digital-to-analog converters (MDACs). The considered calibration technique takes the advantages of both foreground and background calibration schemes. In this combination calibration algorithm, a novel parallel background calibration with signal-shifted correlation is proposed, and its calibration cycle is very short. The details of this technique are described in the example of a 14-bit 100 Msample/s pipelined ADC. The high convergence speed of this background calibration is achieved by three means. First, a modified 1.5-bit stage is proposed in order to allow the injection of a large pseudo-random dithering without missing code. Second, before correlating the signal, it is shifted according to the input signal so that the correlation error converges quickly. Finally, the front pipeline stages are calibrated simultaneously rather than stage by stage to reduce the calibration tracking constants. Simulation results confirm that the combination calibration has a fast startup process and a short background calibration cycle of 2 × 221 conversions.