21 results on '"Soo Min Jin"'
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2. Sputter‐grown GeTe/Sb2Te3 superlattice interfacial phase change memory for low power and multi‐level‐cell operation
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Juyoung Lee, Soo-Min Jin, In-Ho Nam, Hea-Jee Kim, Yun-Heub Song, Tae-Hun Shim, Shin-Young Kang, and Jea-Gun Park
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Phase-change memory ,Materials science ,Multi-level cell ,business.industry ,Sputtering ,Superlattice ,Optoelectronics ,Electrical engineering. Electronics. Nuclear engineering ,Electrical and Electronic Engineering ,business ,Power (physics) ,TK1-9971 - Abstract
The multi‐level feature of GeTe/Sb2Te3 interfacial phase change memory was achieved by applying a designed voltage‐based pulse. It stably demonstrated five multi‐level states without interference for 90 cycles by varying the pulse width. GeTe/Sb2Te3 interfacial phase change memory demonstrated retention time of > 1.0 × 103 s, presenting the significantly low drift coefficient (ν) of
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- 2022
3. Super-Linear-Threshold-Switching Selector with Multiple Jar-Shaped Cu-Filaments in the Amorphous Ge
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Hea-Jee, Kim, Dae-Seong, Woo, Soo-Min, Jin, Hyo-Jun, Kwon, Ki-Hyun, Kwon, Dong-Won, Kim, Dong-Hyun, Park, Dong-Eon, Kim, Hong-Uk, Jin, Hyun-Do, Choi, Tae-Hun, Shim, and Jea-Gun, Park
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The learning and inference efficiencies of an artificial neural network represented by a cross-point synaptic memristor array can be achieved using a selector, with high selectivity (I
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- 2022
4. (Digital Presentation) Electrochemical Metallization Cell Based Memristive Neuron Chip Fabricated with 28nm CMOS Process for Real-Time Unsupervised Learning and Pattern Recognition
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dae Seong Woo, Soo-Min Jin, Hea-Jee Kim, Dong-Eon Kim, Hong-Uk Jin, Hyun-Do Choi, Tae-Hun Shim, and Jea-Gun Park
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Abstract Spiking neurons communicate with other neurons using sparse and binary signals in a human brain, so they can achieve real-time processing of the information with ultra-low power consumption[1,2]. Thereby, spiking neurons are essential elements for building an energy-efficient biomimetic spatiotemporal system. Recently, to emulate the behavior of biological neuron, many researches for memristive device-based neurons with peripheral circuits (i.e., sense-amplifier or reset circuit)[3] and complementary metal-oxide-semiconductor (CMOS) neurons with capacitors have been reported[4]. Most of the reported memristive device-based neurons required a high operation voltage (>1.2 V) for emulating integrate function of a biological neuron. In addition, complementary metal-oxide-semiconductor-based neurons could not achieve high neuronal density due to using a capacitor in emulating integrate function. In this study, therefore, we propose an electrochemical metallization cell based memristive neuron chip fabricated with 28-nm CMOS process having a low operation voltage ( Acknowledgement This research was supported by National R&D Program through the National Research Foundation of Korea(NRF) funded by Ministry of Science and ICT(2021M3F3A2A01037733). Reference Mead, C. Neuromorphic Electronic Systems. Encycl. Comput. Neurosci. 78, 1979–1979 (2015). Douglas, R. Neuromorphic Analogue VLSI. Annu. Rev. Neurosci. 18, 255–281 (1995). Tuma, T., Pantazi, A., Le Gallo, M., Sebastian, A. & Eleftheriou, E. Stochastic phase-change neurons. Nat. Nanotechnol. 11, 693–699 (2016). Aamir, S. A., Müller, P., Hartel, A., Schemmel, J. & Meier, K. A highly tunable 65-nm CMOS LIF neuron for a large scale neuromorphic system. Eur. Solid-State Circuits Conf. 2016-Octob, 71–74 (2016). Figure 1
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- 2022
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5. Bidirectional Electric-induced Conductance based on GeTe/Sb2Te3 Interfacial Phase Change Memory for Neuro-inspired Computing
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Jea-Gun Park, Tae Hun Shim, Yun-Heub Song, Dae Seong Woo, Shin Young Kang, Juyoung Lee, Soo Min Jin, In-Ho Nam, and Yuji Sutou
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artificial synaptic device ,Phase transition ,Materials science ,TK7800-8360 ,Computer Networks and Communications ,Pulse (signal processing) ,business.industry ,Superlattice ,superlattice ,Conductance ,Phase-change memory ,phase change memory ,Nonlinear system ,interfacial phase change memory ,Hardware and Architecture ,Control and Systems Engineering ,Modulation ,Signal Processing ,electrical_electronic_engineering ,Optoelectronics ,neuromorphic devices ,Electronics ,Electrical and Electronic Engineering ,business ,Pulse-width modulation - Abstract
Corresponding to the principles of biological synapses, an essential prerequisite for hardware neural networks using electronics devices is the continuous regulation of conductance. We implemented artificial synaptic characteristics in a (GeTe/Sb2Te3)16 iPCM with a superlattice structure under optimized identical pulse trains. By atomically controlling the Ge switch in the phase transition that appears in the GeTe/Sb2Te3 superlattice structure, multiple conductance states were implemented by applying the appropriate electrical pulses. Furthermore, we found that the bidirectional switching behavior of a (GeTe/Sb2Te3)16 iPCM can achieve a desired resistance level by using the pulse width. Therefore, we fabricated a Ge2Sb2Te5 PCM and designed a pulse scheme, which was based on the phase transition mechanism, to compare to the (GeTe/Sb2Te3)16 iPCM. We also designed an identical pulse scheme that implements both linear and symmetrical LTP and LTD, based on the iPCM mechanism. As a result, the (GeTe/Sb2Te3)16 iPCM showed relatively excellent synaptic characteristics by implementing a gradual conductance modulation, a nonlinearity value of 0.32, and 40 LTP/LTD conductance states by using identical pulse trains. Our results demonstrate the general applicability of the artificial synaptic device for potential use in neuro-inspired computing and next-generation, non-volatile memory.
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- 2021
6. Real‐Time Correlation Detection via Online Learning of a Spiking Neural Network with a Conductive‐Bridge Neuron
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Dong‐Won Kim, Dae‐Seong Woo, Hea‐Jee Kim, Soo‐Min Jin, Sung‐Mok Jung, Dong‐Eon Kim, Jae‐Joon Kim, Tae‐Hun Shim, and Jea‐Gun Park
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Electronic, Optical and Magnetic Materials - Published
- 2022
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7. Bi‐Stable Resistance Generation Mechanism for Oxygenated Amorphous Carbon‐Based Resistive Random‐Access Memory
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Soo‐Min Jin, Hea‐Jee Kim, Dae‐Seong Woo, Sung‐Mok Jung, Dong‐Eon Kim, Tae‐Hun Shim, and Jea‐Gun Park
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Electronic, Optical and Magnetic Materials - Published
- 2022
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8. Nanoscale CuO solid-electrolyte-based conductive-bridging, random-access memory cell with a TiN liner
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Mohammed Jalalah, Jong Sun Lee, Jea-Gun Park, Hea Jee Kim, Dong Won Kim, Ki Hyun Kwon, Myung-JIn Song, Ali Al-Hajry, and Soo Min Jin
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010302 applied physics ,Random access memory ,Materials science ,Bridging (networking) ,Diffusion barrier ,business.industry ,Programmable metallization cell ,General Physics and Astronomy ,chemistry.chemical_element ,02 engineering and technology ,Electrolyte ,021001 nanoscience & nanotechnology ,01 natural sciences ,chemistry ,0103 physical sciences ,Optoelectronics ,0210 nano-technology ,business ,Tin ,Electrical conductor ,Nanoscopic scale - Abstract
The Conductive-bridge random-access memory (CBRAM) cell is a promising candidate for a terabit-level non-volatile memory due to its remarkable advantages. We present for the first time TiN as a diffusion barrier in CBRAM cells for enhancing their reliability. CuO solid-electrolyte-based CBRAM cells implemented with a 0.1-nm TiN liner demonstrated better non-volatile memory characteristics such as ~ 106 AC write/erase endurance cycles with 100-μs AC pulse width and a long retention time of ~ 7.4-years at 85 °C. In addition, the analysis of Ag diffusion in the CBRAM cell suggests that the morphology of the Ag filaments in the electrolyte can be effectively controlled by tuning the thickness of the TiN liner. These promising results pave the way for faster commercialization of terabit-level non-volatile memories.
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- 2018
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9. Effect of TiN Liner Thickness on the Electrical Characteristics and Reliability of CuGeS2/GeS2-Based Selector Device
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Jea-Gun Park, Sung-Mok Jung, Dong Won Kim, Dae-Seong Woo, Soo-Min Jin, Sang-Hong Park, Hea-Jee Kim, and Dong-Eon Kim
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Materials science ,chemistry ,chemistry.chemical_element ,Tin ,Reliability (statistics) ,Reliability engineering - Published
- 2021
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10. Forming-Free Cu-Doped Amorphous-Carbon-Oxide Based Resistive-Random-Access-Memory and Memory Operation Mechanism
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Hea-Jee Kim, Jin-Pyo Hong, Sang-Hong Park, Dae-Seong Woo, Soo-Min Jin, Dong Won Kim, Jea-Gun Park, and Ki-Hyun Kwon
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chemistry.chemical_compound ,Materials science ,Amorphous carbon ,chemistry ,business.industry ,Oxide ,Optoelectronics ,Memory operation ,Cu doped ,business ,Mechanism (sociology) ,Resistive random-access memory - Abstract
Abstract Recently, the demand for more data storage and fast processing has been dramatically increased for the big data markets such as artificial intelligence (AI), virtual reality (VR), autonomous car, and internet of things (IoT). Thus, a new memory such as a storage class memory (SCM) has been introduced since it can perform a reasonable latency compared to DRAM and a lower bit-cost than NAND flash memory [1]. Remind that, generally, a SCM has been fabricated with three-dimensional cross point memory cell array [2]. As a candidate memory cell for SCM, resistive-random-access-memory (ReRAM) has been proposed; i.e., called storage-type SCM. Santini, C. A. et al. demonstrated amorphous carbon oxide (a-COx) based ReRAM-cell having a reasonable memory window margin (I on/I off > 100), a fast switching speed of 20~50 ns at ~ 100-nm-diameter memory cell size. However, it showed extremely a high forming voltage (V forming) of ~ 5.0 V and a high reset voltage (V reset) of ~ – 4.0 V [3]. In particular, the a-COx based ReRAM-cell presented a different bi-stable memory characteristic for another typical ReRAM-cells; i.e., its bias directions of set and reset were opposite to a typical ReRAM, which mechanism was not evidently proved. In addition, the forming process for this ReRAM cell would be highly undesirable since it caused an extra burden for initializing memory-cells and degraded the write and erase endurance cycles [4]. Here, for the first time, we designed a forming-free Cu-doped amorphous-carbon-oxide based ReRAM cell, which did not need a forming process and we reviewed the memory operation mechanism by understanding electrical and chemical properties of the Cu-doped a-COx based ReRAM cells. A typical a-COx based ReRAM-cell needed a forming process; i.e., a forming voltage of – 2.20 V and a set voltage of – 1.05 V, as shown in Fig. 1 (a). Otherwise, a Cu-doped a-COx based ReRAM-cell could achieve a forming-free process; i.e., a forming voltage (i.e. - 0.85 V) was the same as a set voltage (i.e. – 0.85 V), as shown in Fig. 1 (b). In addition, it demonstrated a write and erase endurance cycles of ~106 by sustaining a memory margin of ~1.3×102, being able to be utilized for a commercial nonvolatile memory-cell, as shown in Fig. 1(c). To clarify the forming-free mechanism, the depth profiles of C, Cu, and O atom in the Cu-doped a-COx memory cell were observed in detail under pristine, after set, and after reset process, which were obtained from intensity line-profiles of EELS/EDS elemental mapping images at C-K edges, O-K edges, Cu-Kα, Pt-La1, and W-La1. For the pristine state, C, Cu, and O atoms are uniformly distributed in the Cu-doped a-COx layer, as shown in Fig. 1(d). In addition, after a set process, since a negative voltage was applied to the top Pt electrode, Cu atoms evidently moved and segregated toward the top Pt electrode, as shown in a of Fig. 1(e), while O atoms evidently migrated and pile up toward the bottom W electrode, as shown in b of Fig. 1(e). This result means that the conductive C-C sp2 filaments in the Cu-doped a-COx layer were produced when oxygen atoms migrated and piled up toward bottom W electrode and the conductive Cu-atom filaments were formed in the Cu-doped a-COx layer since Cu atom moved and segregated toward the top Pt electrode. Hence, both conductive C-C sp2 filaments and Cu-atom filaments were generated simultaneously in the Cu-doped a-COx layer, achieving a set process without a forming process. On the other hand, after a reset process, since a positive voltage was applied to the top Pt electrode, Cu and O atoms were redistributed inside the Cu-doped a-COx, resulting in breaking both C-C sp2 filaments and Cu-atom filaments, as shown in a and b of Fig. 1(f). In our presentation, we will demonstrate and review the mechanisms between a set process without forming process and a reset process in detail by electrical and chemical composition depth profiles depending on the applied bias condition. In particular, we will demonstrate a different ReRAM behavior of the Cu-doped a-COx based ReRAM from a typical ReRAM or CBRAM. Acknowledgement This material is based upon work supported by the Ministry of Trade, Industry & Energy(MOTIE, Korea) under Industrial Technology Innovation Program (10068055). Reference [1] Matsui, C. et al. Integration 2019, 69, 62-74. [2] Hady, F. T. et al. Proceedings of the IEEE 2017, 105, (9), 1822-1833. [3] Santini, C. A. et al. Nature Communications 2015, 6, (1), 8600. [4] Skaja, K. et al. Scientific Reports 2018, 8. Figure 1
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- 2020
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11. Al2O3-Based Capacitor-Less Conductive-Bridge Neuron Having Negative-Differential-Resistance
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Jea-Gun Park, Soo-Min Jin, Hea-Jee Kim, Ki-Hyun Kwon, Dong Won Kim, Dae-Seong Woo, and Sang-Hong Park
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Capacitor ,Materials science ,business.industry ,law ,Structural engineering ,business ,Electrical conductor ,Bridge (interpersonal) ,Differential (mathematics) ,law.invention - Abstract
Recently, memristive devices (e.g. CBRAM and ReRAM etc.) have been proposed as an alternative to C-MOSFET based neuromorphic device (i.e. neuron and synapse) to achieve a high neuronal density and low power consumption. Among memristive devices, the conductive bridge neuron has been a great attention due to its area efficiency, low power consumption (< 500 fJ), and good C-MOS compatibility 1-3 . However, past researches have mainly focused on stochastic nature of conductive-bridge neurons. In particular, most of the stochastic conductive-bridge neuron have used capacitors to implement membrane potential, which requires a large integration area (~1000F2). In this works, integrate property of Al2O3-based cap-less conductive-bridge neuron was demonstrated which allows a cost-efficient neuromorphic chip by using a same process technology as a memristor synapse, as shown in Fig 1 (a). Note that the Al2O3-based cap-less conductive-bridge neuron was the same as that of the Al2O3-based memristor synapse. In addition, we investigated the effect of negative-differential-resistance (NDR) characteristic on integrate property for our proposed neuron, depending on the compliance current level (i.e. a shape of metallic filaments in neuron device). The NDR slope was adjusted by varying a compliance current of a Al2O3-based cap-less conductive-bridge neuron. The current compliance (Icc) of 1 mA showed the NDR slope of ~ 0.56 decade/V, as shown in Fig. 1(b). For all spike amplitude (i.e. -0.6~-1.0 V), the resistances of neuron device abruptly increased at a certain number of spikes, depending on the spike amplitude, and then it gradually increased with the number of spikes, as shown in Fig. 1(c). In addition, the spike number being necessary for achieving ~600 Ω decreased exponentially with increasing the number of spikes, as showed integrate property depending on input spike amplitude, as shown in Fig. 1(d). Otherwise, the current compliance (Icc) of 0.1 mA, which was 10 times less than Fig 1 (b) presented the NDR slope of ~ 0.23 decade/V, which was 2 times less than Fig. 1(b), as shown in Fig. 1(e). For all spikes amplitude, the resistance of neuron devices gradually increased with the number of spikes, wherein the resistance of neuron devices increased with the spike amplitude (i.e. negative voltage pulse amplitude), as shown in Fig. 1(f). The spike number being necessary for achieving ~10 kΩ decreased exponentially with increasing the number of spikes, as shown in Fig. 1(g). Comparing Fig. 1(d) with Fig. 1(g), the variation of the spike number being necessary for achieving ~600 Ω for the NDR slope of ~-0.56 decade/V was much less that for the spike number being necessary for achieving ~10 kΩ for the NDR slope of ~-0.23 decade/V. This result indicates that, for the Al2O3-based cap-less conductive-bridge neuron, the NDR slope dominantly determines the integrate nature. In our presentation, we will discuss the mechanism why the integrate property depended on the NDR slope via understanding a shape of conductive-metallic-filaments in Al2O3 layer, which determine an integrate property of neuron devices. In particular, it will be reported that the shape of conductive-metallic-filaments strongly depended on the metal vacancy concentration in binary oxide (i.e. Al2O3) layer. Acknowledgement This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea Government (MSIT) (No. 2016M3A7B4910249). Reference "IEEE Transactions on Emerging Topics in Computational Intelligence," in IEEE Transactions on Emerging Topics in Computational Intelligence, vol. 2, no. 5, pp. C2-C2, Oct. 2018, doi: 10.1109/TETCI.2018.2867377. Jang, B. Attarimashalkoubeh, A. Prakash, H. Hwang and Y. Jeong, "Scalable Neuron Circuit Using Conductive-Bridge RAM for Pattern Reconstructions," in IEEE Transactions on Electron Devices, vol. 63, no. 6, pp. 2610-2613, June 2016, doi: 10.1109/TED.2016.2549359. Palma, M. Suri, D. Querlioz, E. Vianello and B. De Salvo, "Stochastic neuron design using conductive bridge RAM," 2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Brooklyn, NY, 2013, pp. 95-100, doi: 10.1109/NanoArch.2013.6623051. Figure 1
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- 2020
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12. Artificial Neuron Based on TiO2 Cbram for Neuromorphic Computing
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Dong-Won Kim, Ki-Hyun Kwon, Hea-Jee Kim, Soo-Min Jin, Hun-Mo Yang, Ji-Yeon Kim, and Jea-Gun Park
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Recently, CMOS-based artificial neurons have successfully implemented neuron functions such as integrate and fire (IF) or leaky integrate and fire (LIF). In general, CMOS-based artificial neurons use capacitors to implement integration function of neuron. In this case, required RC time constant is about few milliseconds. And it requires large area of capacitor more than 1000F2. Therefore, it is necessary to develop capacitor-less artificial neuron to achieve high neuronal density. In this works, we implemented the integration function of neurons using CBRAM instead of capacitors. For the neuron device, CuTe/TiO2/TiN CBRAM cell was fabricated as shown in figure 1a. The neuron device has W bottom electrode with ~113 nm2 pattern size and 10 nm-thick TiO2 layer, and 200 nm-thick CuTe top electrode with 60 μm2 size. The TiO2-based CBRAM showed a typical bi-stable I-V curve as shown in figure 1b. The CBRAM cells showed negative differential resistance (NDR) during reset process. And it showed integrate characteristic when consecutive negative voltage pulse was induced to top electrode of the CBRAM cell. Figure 1c shows integrate characteristic of TiO2-based CBRAM cell. As shown in figure 1c, as the voltage pulse is applied, current gradually decreases. Also as amplitude of voltage pulse increased, the change of current became greater. Because the area of the CBRAM cell is only 4F2, it is expected that area of artificial neuron can be significantly reduced by replacing conventional capacitor based neuron. We will present how the CBRAM cell can be used to implement artificial neuron. Figure 1
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- 2019
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13. Study on Forming-Free Characteristic of Amorphous Carbon Oxide Reram By Controlling Cu-Filament Shape
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Soo-Min Jin, Ki-Hyun Kwon, Dong-Won Kim, Hea-Jee Kim, Hun-Mo Yang, Ji-Yeon Kim, and Jea-Gun Park
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Resistive random access memory (ReRAM) is one of the most promising candidates for the next-generation memory due to its simple structure, high switching speed and low power consumption [1]. Recently, there has been large interests in using carbon-baed material as solid electrolyte to overcome the limit of conventional metal-oxide memory. It has remarkable advantages over past metal-oxide memory such as high memory margin (Ion/Ioff > 100) and fast switching speed (20~50ns) [2]. However, the requirement of forming process to activate resisitive switching operation is one of the critical issues. Forming process may degrade the device switching characteristic and is not desirable for circuit design. In this study, forming-free characteristic of a-COx (amorphous carbon oxide) based ReRAM was observed by controlling the Cu-filament shape. To accurately control the Cu-atom concentration profile, insertion of Cu thin film was carried out in several ways. The first device, named A, was fabricated with the common ReRAM structure of Pt / Cu-doped a-COx / W. The second device, named B, was vertically stacked with the strcutrue of Pt / a-COx / Cu-doped a-COx / W. The third device, named C, was vertically stacked with the strcutrue of Pt / Cu-doped a-COx / a-COx / Cu-doped a-COx / W. The device was fabricated on W bottom electrode wafer patterned from 34 nm to 1921 nm by photo lithography process. The a-COx and other metals were deposited using dc magnetron sputter (PVD method). After the fabrication, the Cu-atom concentration profile was carefully examined using SIMS analysis to understand the correlation between forming-free chracteristic and Cu-filament shape. Forming-free characteristic device presented identical forming and set voltage of -0.85 V. Moreover, the result indicated that the high resistance state current of 2.41-7 A at 0.1 V, low resistance state current of 5.98-5 A at 0.1 V and the memory window margin (Ion/Ioff) of 2.48×102. In our study, we present that the precise design of the Cu-atom concentration profile of a-COx based ReRAM is the significant key to achieve the forming-free and stable non-volatile memory characteristic. [1] Daniele Ielmini, Semicond. Sci. Technol. 31 (2016) 063002 [2] Claudia A. Santini et al, NAT COMMUN, 6:8600 (2015) * This material is based upon work supported by the Ministry of Trade, Industry & Energy(MOTIE, Korea) under Industrial Technology Innovation Program (10068055). Figure 1
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- 2019
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14. Mechanism of Forming-Free Cu2o Solid-Electrolyte Based Conductive-Bridge Random Access Memory
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Soo-Min Jin, Ki-Hyun Kwon, Dong-Won Kim, Hea-Jee Kim, Hun-Mo Yang, Ji-Yeon Kim, and Jea-Gun Park
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Resistive random access memory (ReRAM) is one of the most promising candidates for the next-generation memory due to its simple structure, high switching speed and low power consumption [1]. Despite of such advantages, its non-volatile characteristic strongly depends on memory cell size. To overcome the weakness, conductive bridging random access memory (CBRAM) cells have been researched as an alternative to oxygen-vacancy type ReRAM cells since CBRAM cells showed independence of non-volatile memory characteristics on the memory cell size [2]. However, CBRAM cells usually require a forming process to produce metal filaments in the solid-electrolyte before memory operation. It had a negative effect on the device since it reflects a high-power consumption. Thus, in this work, Cu2O-based CBRAM cells with forming-free characteristic were presented. In addition, we mainly focused on understanding the dependency of forming-free process on annealing temperature. To confirm the presence of forming process, the resistive switching device was fabricated on a Pt-bottom electrode (BE) with a 250nm via-hole pattern, and annealed at the temperature of as-sputtered, 150, 250 and 300 ˚C. As shown in Fig. 1(a) and 1(b), as-sputtered and 150 ˚C post annealing CBRAM cells demonstrated forming-free characteristic. However, reset process was not effectively work. For the case of 300 ˚C post annealing CBRAM cell, it required forming process as shown in Figure. 1(d). CBRAM cell with 250 ˚C post annealing demonstrated both bi-stable I-V characteristic and forming free characteristic. To understand the mechanism of the forming-free process at 250 ˚C post annealing, EDS line scanning/mapping were carried out on the CBRAM cells annealed at 150, 250, 300 and 400 ˚C repectively (Fig.2 (a)-(d)). According to the EDS analysis, the diffusion amount of Ag in the Cu2O layer decreases as the annealing temperature increases. This tendency can be attributed to the decrease in the number of metal vacancies sites. In the saturated case, as shown in Fig. 2(a) and 2(b), the reset process did not effectively work due to the excessive density of VCu 2- leaving not enough room for breaking the filament. In the optimal case, as shown in Fig. 2(c), forming-free characteristic and both set/reset process worked successfully due to the optimal gap between the concentrated area of Ag and the bottom electrode. In the deficient case, as shown in Fig. 2(d), the forming process was required due to the low density of VCu 2- in solid-electrolyte layer and the high gap between the concentrated area of Ag and bottom electrode. In our study, we report the annealing temperature (250 ˚C is the optimal condition in this study) is the significant key to achieve the forming-free and stable non-volatile characteristics via controlling the concentration of negatively charged Cu vacancies, where Ag ions can diffuse through. [1] Daniele Ielmini, Semicond. Sci. Technol. 31 (2016) 063002 [2] Ilia Valov, J. Phys. D: Appl. Phys. 46 (2013) 074005 This material is based upon work supported by the Ministry of Trade, Industry & Energy(MOTIE, Korea) under Industrial Technology Innovation Program (10068055). Figure 1
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- 2018
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15. Selection Device with Cu Doped-Chalcogenide Material for 3D Cross-Point Array Structure of 1selector-1resistor Memory Cells
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Ki-Hyun Kwon, Myung-JIn Song, Dong-Won Kim, Hea-Jee Kim, Soo-Min Jin, Do Jun Kim, Hun-Mo Yang, and Jea-Gun Park
- Abstract
Resistive random access memories (ReRAMs) have been researched to replace current NAND flash memory due to non-volatile memory characteristics, low power consumption, high operation speed, and minimum 4F2 memory cell size[1]. However, to achieve high density of tera-bit level cells, it is needed to operate ReRAM cells with cross-point array structure which required selection device to limit the sneak current path in high-density ReRAM cells. Therefore, recently bi-directional selection devices with two-terminal structure such as ovonic threshold switching (OTS)[2], p-n-p type (PNP)[3], and mixed ionic electronic conduction (MIEC)[4] have been researched to suppress the sneak current path. In this work, we investigated the electrical features of the selection device with Cu-doped chalcogenide material to attain high non-linearity(>105), high on-state current(Ion )(>10 MA/cm2) and low off-state current(Ioff )(2) because Cu ions moved well by E-field and generated interstitials/vacancies acting as dopants. We fabricated the selection device of the structure of W / Cu-doped chalcogenide material / Pt by varying the pattern size of ranging 34 to 1,921 nm as shown in Fig.1. The device performance of Ion , Ioff , threshold voltage(VT ), and non-linearity(Ion @Von/Ioff @1/2Von ) was characterized. The Cu-doped chalcogenide material layer was deposited by RF magnetron co-sputtering on W bottom electrode patterned by photo lithography process. Then, Pt top electrode was deposited by DC magnetron sputtering. The selection device with Cu-doped chalcogenide material demonstrated threshold voltage of ~1.0 V, low Ioff of < 3.66 mA/cm2, Ion of > 1.82 A/cm2, and non-linearity of > 500 as shown in Fig.2. Finally, we present how the device performance is affected by varying the film thickness, annealing temperature, device size and stack-layer structure. In addition, the uniformity and the reliability of the selection device such as endurance cycling and retention time were investigated. In particular, the mechanism on operating behavior of the selection device will be presented by analyzing the composition and crystallinity of Cu-doped chalcogenide film by using Auger, energy-dispersive X-ray spectroscopy (EDS), cross sectional transmission electron microscopy (TEM) and X-ray diffraction (XRD). *This work was financially supported by the Ministry of Trade, Industry & Energy(MOTIE, Korea) under Industrial Technology Innovation Program (10068055), the Brain Korea 21 Plus 2016, Republic of Korea and Hanyang University-Samsung Electronics selector research project. Reference [1] Choi, B. J et al., Advanced Materials 23, 3847-3852 (2011). [2] S. Kim et al., VLSI, T240 (2013) [3] S. Jo et al., IEDM, 6.7.1 (2014) [4] G. Burr et al., VLSI, p41 (2012) Figure 1
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- 2017
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16. Effect of Cu-Doped Switching Layer of Amorphous Carbon-Oxide Based Reram on Non-Volatile Memory Characteristics for Forming-Free Operation
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Jea-Gun Park, Hea-Jee Kim, Myung-JIn Song, Ki-Hyun Kwon, Dong-Won Kim, Soo-Min Jin, Do Jun Kim, and Hun-Mo Yang
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Resistive random access memory (ReRAM) is one of the candidates to alternate NAND flash memory due to its potential scalability, fast switching speed and low operating power [1]. However, for ReRAM in general, high-voltage forming process is needed to initiate the switching, which normally lead to high power consumption and operational complexity [2]. Therefore, the forming-free operation of ReRAM has been researched globally. In this work, to overcome this high voltage forming operation, the effect of Cu-doping on switching layer of amorphous carbon-oxide ReRAM was studied. ReRAM was fabricated with the structure of tungsten (W) / Cu-doped amorphous carbon oxide / hafnium oxide (HfO2) / platinum (Pt). The buffer layer, hafnium oxide, was inserted to decrease the current level increased excessively due to Cu-doping. It was confirmed that Cu-doping decreased forming voltage and increased memory margin. As comparing the characteristics of the ReRAM with and without Cu-doping at 34-nm pattern size, the forming voltage of Cu-doped ReRAM decreased from 2.7 to 1.95 V and also set voltage of that decreased a little from 1.8 to 1.65 V. From I-V characteristic graph, Cu-doped ReRAM demonstrated that the forming voltage was similar to the set voltage, indicating for the possibility of forming free operation. In addition, the memory margin of that was enlarged from 1.62×102 to 2.64×103. Besides, both of the devices had 106AC endurance cycles, which were excellent performance compared with other ReRAM devices. In our presentation, we report the effect of Cu-doping on electrical characteristics and the switching mechanism by using various analysis tools such as transmission electron microscopy (TEM). * This material is based upon work supported by the Ministry of Trade, Industry & Energy (MOTIE, Korea) under Industrial Technology Innovation Program (10068055). [1] Li Ji; Integrated one diode-one resister architecture in nanopillar SiOxresistive switching memory by nanosphere lithography. Nano Lett. 2014, 14, 813-818 [2] Ruomeng Huang; Forming-free resistive switching of tunable ZnO films grown by atomic layer deposition. Microelectron. Eng. 2016, 161, 7-12 Figure 1
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- 2017
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17. Effect of Resistive Switching-Layer Oxygen-Concentration on Nonvolatile Memory Characteristics for Carbon-Oxide Based Reram
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Soo-Min Jin, Ki-Hyun Kwon, Dong Won Kim, Hye-Jee Kim, Do Jun Kim, and Jea-Gun Park
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Resistive random access memories (ReRAM) are highly promising as one of next-generation memories due to high current density, high speed, simple structure, and low power consumption [1]. Recently, amorphous carbon oxide based ReRAM has been researched due to its strong advantages over typical ReRAM chacacteristics such as large memory margin (Ion/Ioff > 100), high switching speed (20~50ns) and CMOS compatible process. In this work, we present the electrical features of amorphous carbon oxide, working as a resistive switching layer [2], where tunsten (W) / amorphous carbon oxide / platinum (Pt) configuration with the pattern size of ranging 34 to 1,921 nm. The thickness of carbon oxide, O2 flow rate of RF magnetron sputter, and N2-annealing temperature were varied with the device cell size to optimize the device performance. The device of amorphous carbon oxide based ReRAM demonstrated typical electrical characteristics, i.e., the set voltage of 1.8 V, the reset voltage of –2.0 V, high resistance state current of 4.6×10-11 A at 0.1 V, and low resistance state current of 7.5×10-9 A at 0.1 V. Moreover, stable endurance and retention were observed at 10 nm-thick amorphous carbon oxide after N2-annealing at 400 oC, which were the endurance of 1.0×106 cycles with a margin (Ion/Ioff ) of 3.5×101 and retention of 105 sec with a margin of 6.2×101. In particular, we present the mechanism and memory characteristics on operating behavior of the amorphous carbon-oxide based ReRAM via investigating the effect of amorphous carbon-oxide thickness, O2 flow rate of RF magnetron sputter, and N2-annealing temperature on the electrical characteristics by using auger electron spectroscopy(AES), energy-dispersive X-ray spectroscopy (EDS), cross sectional transmission electron microscopy (TEM) and X-ray diffraction (XRD). * This material is based upon work supported by the Ministry of Trade, Industry & Energy(MOTIE, Korea) under Industrial Technology Innovation Program (10068055). [1] Daniele Ielmini, Semicond. Sci. Technol. 31 (2016) 063002 [2] Claudia A. Santini et al, NAT COMMUN, 6:8600 (2015) Figure 1
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- 2017
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18. TiO2 Based Conductive-Bridge-Random-Access-Memory
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Dong-Won Kim, Myung-JIn Song, Ki-Hyun Kwon, Hye-Jee Kim, Soo-Min Jin, Do-joon Kim, and Jea-Gun Park
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NAND flash is currently facing physical limitations for 10nm technology because as NAND flash cells have been getting smaller, cell to cell interference significantly increase. To overcome these challenge, new memories have been developed. Conductive Bridge Random Access Memory (CBRAM) is a one of the most promising new memories due to its simple structure, low power consumption, high scaling potential, large on/off margin and high speed. It has been reported that resistivity switching of CBRAM is induced by filament formation and rupture due to metal cation movement in the solid electrolyte. In the previous our research work, we studied CuO based CBRAM using CuTe top electrode. But CuO is not a fab-friendly material. In this work, instead of CuO based material, TiO2 are used for solid electrolyte because TiO2 is fab-friendly material and it has a good compatibility with a conventional CMOS process. TiO2 exist in three phases in atmospheric pressure, i.e. anatase, rutile and brookite, which phase of TiO2 presents different physical properties. In this work, we compared switching characteristics of amorphous with anatase phases TiO2 CBRAM. XRD confirmed amorphous-anatase phase transition at annealing temperature of 400 oC, as shown in Fig.1. Based on the crystallinity of TiO2 thin film, two different samples were prepared, amorphous (W/O annealing) and anatase phase TiO2 CBRAM (400 oC annealing). The CBRAM was fabricated on plug type TiN bottom electrode patterned wafer. The size of the bottom electrode was 34nm to 1921nm. TiO2 layer was deposited by RF magnetron sputter. And CuTe electrode was deposited by DC magnetron sputter. The structure of the device was shown in Fig.2 (a). On/Off ratio of TiO2 based CBRAM with amorphous phase was greater than that with anatase phase TiO2 CBRAM because HRS (High Resistive State) of the amorphous phase TiO2 CBRAM was lower than that of anatase phase TiO2 CBRAM. The amorphous and anatase phase TiO2 based CBRAMs demonstrated the endurance cycles of 105 and 2X106 respectively. We will report the memory characteristic of two phases TiO2based CBRAMs and explained why they showed the different memory characteristic. * This work was financially supported by the Industrial Strategic Technology Development Program (10039191, The Next Generation MLC PRAM, 3D ReRAM, Device, Materials and Micro Fabrication Technology Development) funded by the Ministry of Trade, Industry and Energy (MOTIE), Republic of Korea and the Brain Korea 21 Plus, Republic of Korea. Figure 1
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- 2016
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19. Multi-Level CuO-Based Conductive-Bridging-Random-Access-Memory Cell Embedded with Au Ncs
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Myung-JIn Song, Ki-Hyun Kwon, Dong-Won Kim, Hye-Jee Kim, Soo-Min Jin, and Jea-Gun Park
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Recently, memory industry has demanded terabit-level memory cell of high density to have bit cost-competition. However, current memory technology such as DRAM and NAND flash memory has a physical limit due to their charge-storage system. Conductive bridging random access memory (CBRAM) is considering as one of the promising candidate for next generation non-volatile memory (NVM) because it has many advantages such as low power consumption, and large on/off ratio. In particular, CBRAM has a possibility of terra-bit-level nonvolatile memory as a post flash memory due to their 4F2simple structure of a top reactive electrode, electrolyte, and bottom inert electrode, and they showed a bipolar switching memory characteristic.[1] We have developed a nanoscale CBRAM cell with a structure of TiN/CuO/Ag/TiN. It showed good nonvolatile memory performance such as as a ~1.23 X 102 memory margin (Ion/Ioff), ~3 X 106 AC set/reset endurance cycles by with 100-μs AC pulse width by sustaining a 1.31 X 102 memory margin, ~6.63-years retention time at 85 °C by sustaining a 3.63 X 102 memory margin, 100 ns program speed, and multi-level (four level) cell operation.[2] However, for achieving commercial-level non-volatile memory cell, the CBRAM cell with Ag or Cu electrode has some problem such as poor stability and reliability due to undesired diffusion of Ag and Cu ions in solid-electrolyte. Thus, the undesired diffusion of Ag and Cu ions leads to the formation of multiple and thick filaments resulting in degradation of write/erase endurance cycles. To solve this issue, we applied Cu-Te alloy electrode for CuO solid-electrolyte-based CBRAM cell. Also, to enhance the nonvolatile memory characteristics of the CBRAM cell, Au nano-crystals (NCs) were intentionally inserted between the CuO solid electrolyte and TiN bottom electrode, where the Au NCs were created by depositing Au thin-film via thermal evaporation. Thus, the Au NCs inserted in CBRAM cell made intensive fields be formed on Au NCs and then localized Cu-ion bridging filaments could be formed on Au NCs deposited in solid electrolyte earlier than on TiN bottom electrode. Since it was well-known that the CBRAM was operated by metal-filaments formed in solid electrolyte, well-controlled metal-filaments could be a key factor of nonvolatile memory characteristics. Therefore, inserting the Au NCs in the CBRAM cell could enhance the nonvolatile memory characteristics and reduce the forming voltage of CBRAM cell due to controlling the random position and orientation of Cu-ion bridging filaments. The CBRAM cell embedded with proper Au NCs exhibited the enhanced nonvolatile memory characteristics such as AC set/reset endurance cycles of 1.0 X 107, read endurance cycles of 1.0 X 1010, and retention time at 85 oC of ~16 years. Moreover, the multi-level cell operation of the CBRAM cell embedded with proper Au NCs also was obtained with improved AC set/reset endurance cycles of 1.0 X 105, and retention time of 1.0 X 105sec. * This work was financially supported by the Industrial Strategic Technology Development Program (10039191, The Next Generation MLC PRAM, 3D ReRAM, Device, Materials and Micro Fabrication Technology Development) funded by the Ministry of Trade, Industry and Energy (MOTIE), Republic of Korea and the Brain Korea 21 Plus, Republic of Korea. Figure 1
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- 2016
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20. Single crystalline silicon substrate lift-off using electrodeposition process
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Soo-Min Jin, Youngim Kwon, Seungki Yoon, and Bongyoung Yoo
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Lift (force) ,Materials science ,Chemical engineering ,Nanotechnology ,Crystalline silicon - Published
- 2012
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21. Multi Level Operation of CuO Based Cbram with Cute Electrode
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Dong Won Kim, Kyoung-Cheol Kwon, Myung-JIn Song, Ki-Hyun Kwon, Hye-Jee KiM, Soo-Min Jin, Ye-Ji Son, and Jea-Gun Park
- Abstract
Conducting Bridge Random Access Memory (CBRAM) is a one of the most promising new memories due to its simple structure, low power consumption, high scaling potential, large on/off margin and high speed. It has been known that resistivity switching mechanism of CBRAM is induced by filament formation and rupture due to metal cation movement in the solid electrolyte. Typically CBRAM has capacitor like structure that a solid electrolyte is inserted between two metal electrodes. One electrode must be reactive metal and the other must be inert. Ag and Cu have been mainly used for a reactive electrode in CBRAM due to high field-induced-diffusivity of ion in the solid electrolyte. Such a reactive metal acts as an ion supplying source to form metal filament in solid electrolyte. In some cases, since too strong filament was formed in the solid electrolyte due to high field-induced-diffusivity of ion causing a reset stuck, it is hard to control filament formation and rupture. Although many studies on CBRAM have been carried out, there are only a few studies on controlling filament. Therefore we investigated how the filament formation is controlled with CuTe electrode and demonstrated muiti level operation of CuO based CBRAM with CuTe electrodes. In particular, we compared CuTe with Cu electrodes to understand the role of Te in CuO based CBRAM with CuTe electrode. Fig.1 shows that CuO based CBRAM structure and I-V curves with Cu and CuTe electrode, respectively. In case of Cu electrode, reset stuck occurs at operation condition with high compliance current (10-3A) while switching behavior appears at operation condition with low compliance current, as shown in Fig.1 (b). On the other hand, CuO based CBRAM with CuTe electrode shows stable switching behavior at operation condition with low compliance current and even at the high compliance current, as shown in Fig.1 (e). In case of Cu electrode, it was expected that too strong and thick filament was formed in the CuO solid electrolyte at operation condition with high compliance current. On the other hand, partially localized thin-filament is formed in case of CuTe electrode so that, Te acts as diffusion barrier of Cu. In addition, On/Off ratio of CuO based CBRAM with CuTe electrode was bigger than that of Cu electrode so that, HRS (High Resistive State) of the CuO based CBRAM with CuTe electrode was lower than that of the CuO based CBRAM with Cu electrode. These results indicate that CuO based CBRAM with CuTe electrode showed superior properties in MLC. CuO CBRAM with CuTe electrode shows retention time 5x104sec, DC program/erase cycles of 102, and memory margin (Ion/Ioff) higher than 103 with four different state, as shown Fig. 2. In the conference meeting, we present switching characteristics at high compliance current in CuO based CBRAM by using CuTe electrode and discuss Multi Level Cell (MLC) operation by varying compliance current. * This work was financially supported by the Industrial Strategic Technology Development Program (10039191, The Next Generation MLC PRAM, 3D ReRAM, Device, Materials and Micro Fabrication Technology Development) funded by the Ministry of Trade, Industry and Energy (MOTIE), Republic of Korea and the Brain Korea 21 Plus, Republic of Korea. Reference [1] Juarez L. F. Da Silva et al, Stability and electronic structures of CuxTe, Applied Physics Letters 91, 091902 (2007) [2] L. Goux et al, Influence of the Cu-Te composition and microstructure on the resistive switching of CuTe/Al2O3/Si cells, Applied Physics Letters 99, 053502 (2011) Figure 1
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- 2015
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