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1. Time in SCCharts

Author

Schulz-Rosengarten, Alexander, von Hanxleden, Reinhard, Mallet, Frédéric, de Simone, Robert, Deantoni, Julien, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Kazmierski, Tom J., editor, Steinhorst, Sebastian, editor, and Große, Daniel, editor

Published
2020
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2. Efficient FFT mapping on GPU for radar processing application: modeling and implementation

Author

Bergach, Mohamed Amine, Kofman, Emilien, de Simone, Robert, Tissot, Serge, and Syska, Michel

Subjects
Computer Science - Mathematical Software, Computer Science - Distributed, Parallel, and Cluster Computing, Computer Science - Performance
Abstract

General-purpose multiprocessors (as, in our case, Intel IvyBridge and Intel Haswell) increasingly add GPU computing power to the former multicore architectures. When used for embedded applications (for us, Synthetic aperture radar) with intensive signal processing requirements, they must constantly compute convolution algorithms, such as the famous Fast Fourier Transform. Due to its "fractal" nature (the typical butterfly shape, with larger FFTs defined as combination of smaller ones with auxiliary data array transpose functions), one can hope to compute analytically the size of the largest FFT that can be performed locally on an elementary GPU compute block. Then, the full application must be organized around this given building block size. Now, due to phenomena involved in the data transfers between various memory levels across CPUs and GPUs, the optimality of such a scheme is only loosely predictable (as communications tend to overcome in time the complexity of computations). Therefore a mix of (theoretical) analytic approach and (practical) runtime validation is here needed. As we shall illustrate, this occurs at both stage, first at the level of deciding on a given elementary FFT block size, then at the full application level.

Published
2015

3. Periodic scheduling of marked graphs using balanced binary words

Author

Millo, Jean-Vivien and De Simone, Robert

Subjects
Computer Science - Formal Languages and Automata Theory
Abstract

This report presents an algorithm to statically schedule live and strongly connected Marked Graphs (MG). The proposed algorithm computes the best execution where the execution rate is maximal and place sizes are minimal. The proposed algorithm provides transition schedules represented as binary words. These words are chosen to be balanced. The contributions of this paper is the proposed algorithm itself along with the characterization of the best execution of any MG., Comment: No. RR-7891 (2012)

Published
2012

4. Time in SCCharts

Author

Schulz-Rosengarten, Alexander, primary, von Hanxleden, Reinhard, additional, Mallet, Frédéric, additional, de Simone, Robert, additional, and Deantoni, Julien, additional

Published
2019
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5. Instant-Based and State-Based Analysis of Infinite Logical Clock

Author

Xu, Qingguo, Miao, Huaikou, de Simone, Robert, DeAntoni, Julien, Hutchison, David, Series editor, Kanade, Takeo, Series editor, Kittler, Josef, Series editor, Kleinberg, Jon M., Series editor, Mattern, Friedemann, Series editor, Mitchell, John C., Series editor, Naor, Moni, Series editor, Pandu Rangan, C., Series editor, Steffen, Bernhard, Series editor, Terzopoulos, Demetri, Series editor, Tygar, Doug, Series editor, Weikum, Gerhard, Series editor, Liu, Shaoying, editor, Duan, Zhenhua, editor, Tian, Cong, editor, and Nagoya, Fumiko, editor

Published
2017
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7. Divergence Detection for CCSL Specification via Clock Causality Chain

Author

Xu, Qingguo, de Simone, Robert, DeAntoni, Julien, Hutchison, David, Series editor, Kanade, Takeo, Series editor, Kittler, Josef, Series editor, Kleinberg, Jon M., Series editor, Mattern, Friedemann, Series editor, Mitchell, John C., Series editor, Naor, Moni, Series editor, Pandu Rangan, C., Series editor, Steffen, Bernhard, Series editor, Terzopoulos, Demetri, Series editor, Tygar, Doug, Series editor, Weikum, Gerhard, Series editor, Fränzle, Martin, editor, Kapur, Deepak, editor, and Zhan, Naijun, editor

Published
2016
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8. Sémantique formelle du langage PsyC

Author

Siron, Fabien, Potop-Butucaru, Dumitru, de Simone, Robert, Chabrol, Damien, Methni, Amira, Logical Time for Formal Embedded System Design (KAIROS), Inria Sophia Antipolis - Méditerranée (CRISAM), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-COMmunications, Réseaux, systèmes Embarqués et Distribués (Laboratoire I3S - COMRED), Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA), KRONO‐SAFE, and Inria - Sophia Antipolis

Subjects
Logical Execution Time, Système Temps-Réel, Multiform Logical Time, Sémantique Formelle, Temps d’Exécution Logique, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Real-Time Systems, Temps Logique Multiforme, Formal Semantics
Abstract

Time must be taken into account from the very start of the design of real-time systems. Because exact computation durations are usually not available in early design phase, multiple formalisms based on the concept of Multiform Logical Time have been introduced. Thesynchronous approach introduced a discretized abstraction of time based on logical clocks, on which computation happens logically instantaneously. While being very expressive, the synchronous approach suffer from compilation issues when mapping logical time to non-negligible real-time computation durations. In answer, the Logical Execution Time (LET) paradigm has been introduced to give such a compromise between the strong expressiveness of the synchronous approach and traditional task scheduling, making LET a perfect fit for the temporal architecture and the software integration of real-time systems. In this report, we consider a variation of LET extended with logical clocks, namely synchronous LET (sLET), implemented in the industrial language PsyC. The sLET approach — and thus PsyC — allows to specify computation to be executed inside a logical interval up to the next occurrence of a logical clock expression (i.e. in opposition to a constant duration). As sLET is based on both LET and the synchronous approach, we give in this report two operational semantics of the PsyC language: a native semantics (or big-step) based on the Structural Operational Semantics approach (S.O.S.) and a synchronous semantics defined by translation to the Esterel language. The former gathers all valid computation schedulings as an equivalence class, of which the latter provides a specific representative (as-soon-as-possible execution). We show the semantics equivalence of those two semantics at interval boundaries. While the native semantics is mainly used for compilation, future work will show how logical timing properties can be verified using those two semantics.; Le temps doit être pris en compte dès le début de la conception des systèmes temps-réel. Du fait que les durées exactes des calculs ne sont généralement pas disponibles au début de la phase de conception, plusieurs formalismes basés sur le concept de Temps Logique Multiforme ont été introduits dans la littérature. L’approche synchrone introduit une abstraction discrète du temps basée sur des horloges logiques, sur lesquels les calculs s’effectuent logiquement instantanément. Bien que très expressive, l’approche synchrone souffre de difficultés de compilation lors de l’association du temps logique à des durées de calculs non négligeables. En réponse, le paradigme Temps d’Exécution Logique (LET) a été introduit comme compromis entre l’expressivité de l’approche synchrone et l’ordonnancement temps-réel traditionnel, ce qui fait que le LET est parfaitement adapté à la modélisation d’architecture temporelle. Dans ce rapport, nous considérons une variation du LET enrichi via l’usage d’horloges logiques, que nous appellerons LET synchrone (sLET), implémenté par le langage industriel PsyC. L’approche sLET— et donc le PsyC — permet de spécifier un calcul comme étant exécuté au sein d’un intervalle de temps logique jusqu’à la prochaine occurrence d’une expression d’horloge (en opposition à une durée constante). Du fait que sLET est basé à la fois sur LET et sur l’approche synchrone, nous donnons dans ce rapport deux sémantiques opérationnelles du PsyC : une sémantique native (ou grand pas) basée sur une approche à la Plotkin (S.O.S.) et une sémantique synchrone définie par traduction vers le langage Esterel. La première regroupe tous les ordonnancement valides sous forme de classe d’équivalence, dans laquelle la seconde donne un représentant spécifique (dès que possible). Nous montrons l’équivalence sémantique de ces deux sémantiques sur les bornes des intervalles. La sémantique native est principalement utilisée pour la compilation, tandis que des travaux à venir montreront comment vérifier des propriétés de temporisation en utilisant essentiellement la sémantique synchrone.

Published
2023

9. On the Scalability of Constraint Solving for Static/Off-Line Real-Time Scheduling

Author

Gorcitz, Raul, Kofman, Emilien, Carle, Thomas, Potop-Butucaru, Dumitru, de Simone, Robert, Hutchison, David, Series editor, Kanade, Takeo, Series editor, Kittler, Josef, Series editor, Kleinberg, Jon M., Series editor, Mattern, Friedemann, Series editor, Mitchell, John C., Series editor, Naor, Moni, Series editor, Pandu Rangan, C., Series editor, Steffen, Bernhard, Series editor, Terzopoulos, Demetri, Series editor, Tygar, Doug, Series editor, Weikum, Gerhard, Series editor, Sankaranarayanan, Sriram, editor, and Vicario, Enrico, editor

Published
2015
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17. Modeling Time(s)

Author

André, Charles, Mallet, Frédéric, de Simone, Robert, Hutchison, David, editor, Kanade, Takeo, editor, Kittler, Josef, editor, Kleinberg, Jon M., editor, Mattern, Friedemann, editor, Mitchell, John C., editor, Naor, Moni, editor, Nierstrasz, Oscar, editor, Pandu Rangan, C., editor, Steffen, Bernhard, editor, Sudan, Madhu, editor, Terzopoulos, Demetri, editor, Tygar, Doug, editor, Vardi, Moshe Y., editor, Weikum, Gerhard, editor, Engels, Gregor, editor, Opdyke, Bill, editor, Schmidt, Douglas C., editor, and Weil, Frank, editor

Published
2007
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18. The synchronous Logical Execution Time paradigm

Author

Siron, Fabien, Potop-Butucaru, Dumitru, de Simone, Robert, Chabrol, Damien, Methni, Amira, KRONO‐SAFE, Université Côte d'Azur (UCA), Logical Time for Formal Embedded System Design (KAIROS), Inria Sophia Antipolis - Méditerranée (CRISAM), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-COMmunications, Réseaux, systèmes Embarqués et Distribués (Laboratoire I3S - COMRED), Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), and COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)

Subjects
[INFO.INFO-ES]Computer Science [cs]/Embedded Systems, ComputingMilieux_MISCELLANEOUS
Abstract

International audience; Real-Time industrial systems are not so much of those that have to perform tasks incredibly fast, but in a timepredictable manner; they rather focus on meeting previously specified timing requirements in a provable way. Consequently, time must be taken into account from the very start of the design. However, exact timing constants may not be available yet inearly design stages as they may depend on the target. In answer, formalisms based on the Multiform Logical Time have been introduced to abstract real-time durations. The Synchronous-Reactive (SR) approach introduced a discretized abstraction of time on which computations happen logically instantaneously. Contrary to SR, Logical Execution Time (LET) mandates to specify the actual logical duration a task has to fulfill. This allows a more efficient compilation, at the price of a lower expressiveness. Classical LET (i.e. as introduced in Giotto/TDL) sticks to uniform pseudo-physical time, i.e. based on one logical clock mapped to the real-time. In this paper, we introduce a new paradigm called synchronous Logical Execution Time (sLET) that builds upon both SR and LET paradigms. It keeps the idea of logical durations coming from the LET paradigm, while having logical instants based on logical clocks. This extends the expressivity of LET, as time is totally abstracted as sequences of events. The various schedulings provide physically timedversions that, while having distinct non-functional properties (in terms of performance mostly), remain mutually functionally equivalent (in the logical time realm). A particular instance, where computations are executed ”in a single instant”, and then time is advanced (as in classical event-driven simulation), can lead to a direct translation into synchronous formalisms (in our case Esterel). We started inquiring how this could open new ways of verification and analysis on PsyC program.

Published
2022

19. Syntax-Driven Reachable State Space Construction of Synchronous Reactive Programs

Author

Vecchié, Eric, de Simone, Robert, Hutchison, David, editor, Kanade, Takeo, editor, Kittler, Josef, editor, Kleinberg, Jon M., editor, Mattern, Friedemann, editor, Mitchell, John C., editor, Naor, Moni, editor, Nierstrasz, Oscar, editor, Pandu Rangan, C., editor, Steffen, Bernhard, editor, Sudan, Madhu, editor, Terzopoulos, Demetri, editor, Tygar, Dough, editor, Vardi, Moshe Y., editor, Weikum, Gerhard, editor, Etessami, Kousha, editor, and Rajamani, Sriram K., editor

Published
2005
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25. The FC2TOOLS set

Author

Bouali, Amar, Ressouche, Annie, Roy, Valérie, de Simone, Robert, Goos, Gerhard, editor, Hartmanis, Juris, editor, van Leeuwen, Jan, editor, Alur, Rajeev, editor, and Henzinger, Thomas A., editor

Published
1996
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28. Vérification d'applications temps-réel basées sur le paradigme de Logical Execution Time (LET)

Author

Siron, Fabien, Potop-Butucaru, Dumitru, de Simone, Robert, Chabrol, Damien, Methni, Amira, KRONO‐SAFE, Université Côte d'Azur (UCA), Logical Time for Formal Embedded System Design (KAIROS), Inria Sophia Antipolis - Méditerranée (CRISAM), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-COMmunications, Réseaux, systèmes Embarqués et Distribués (Laboratoire I3S - COMRED), Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), and COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)

Subjects
[INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Abstract

National audience; Le design de logiciel de contrôle/commande embarqué dépend de contraintes temporelles strictes. Pour cela, des formalismes et des théories basés sur la notion de temps logique permettent d'abstraire les durées temps-réel qui ne sont pas toujours connues au niveau conception. Cet article propose une comparaison des formalismes synchrones et du paradigme Logical Execution Time (LET) dans le but d'adapter au langage industriel PsyC, qui est proche du LET, des méthodes de vérification issues des langages synchrones.

Published
2021

29. Programming and verifying real-time design using logical time

Author

Siron, Fabien, Potop-Butucaru, Dumitru, de Simone, Robert, Chabrol, Damien, Methni, Amira, KRONO‐SAFE, Université Côte d'Azur (UCA), Logical Time for Formal Embedded System Design (KAIROS), Inria Sophia Antipolis - Méditerranée (CRISAM), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-COMmunications, Réseaux, systèmes Embarqués et Distribués (Laboratoire I3S - COMRED), Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), and COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)

Subjects
[INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Abstract

International audience; The design of embedded control software calls for stringent real-time constraints. For that, formalisms and theories based on the notion of logical time give abstraction of real-time durations that are usually not known at design level. Comparison between synchronous languages, Logical Execution Time (LET) and the PsyC language can be fruitful, in our case, with the goal of empowering the industrial language PsyC, which is close to LET, with (logical) time and functional verification methods inspired from synchronous languages.

Published
2021

32. Auto/autograph

Author

Roy, Valérie, Simone, Robert de, Goos, Gerhard, editor, Hartmanis, Juris, editor, Clarke, Edmund M., editor, and Kurshan, Robert P., editor

Published
1991
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33. Process calculi, from theory to practice: Verification tools

Author

Boudol, Gérard, Roy, Valérie, de Simone, Robert, Vergamini, Didier, Goos, G., editor, Hartmanis, J., editor, Barstow, D., editor, Brauer, W., editor, Brinch Hansen, P., editor, Gries, D., editor, Luckham, D., editor, Moler, C., editor, Pnueli, A., editor, Seegmüller, G., editor, Stoer, J., editor, Wirth, N., editor, and Sifakis, Joseph, editor

Published
1990
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36. Multiform Logical Time & Space for Mobile Cyber-Physical System with Automated Driving Assistance System

Author

Liu, Qian, De Simone, Robert, Chen, Xiaohong, Liu, Jing, Logical Time for Formal Embedded System Design (KAIROS), Inria Sophia Antipolis - Méditerranée (CRISAM), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-COMmunications, Réseaux, systèmes Embarqués et Distribués (Laboratoire I3S - COMRED), Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), Université Nice Sophia Antipolis (... - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Université Nice Sophia Antipolis (... - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA), East China Normal University [Shangaï] (ECNU), Université Nice Sophia Antipolis (1965 - 2019) (UNS), and COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Université Nice Sophia Antipolis (1965 - 2019) (UNS)

Subjects
Multiform Logical Time, Safety Specification, Spatio-temporal logics, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Automated Driving
Abstract

International audience; We study the use of Multiform Logical Time, as embodied in Esterel/SyncCharts and Clock Constraint Specification Language (CCSL), for the specification of assume-guarantee constraints providing safe driving rules related to time and space, in the context of Automated Driving Assistance Systems (ADAS). The main novelty lies in the use of logical clocks to represent the epochs of specific area encounters (when particular area trajectories just start overlapping for instance), thereby combining time and space constraints by CCSL to build safe driving rules specification. We propose the safe specification pattern at high-level that provide the required expressiveness for safe driving rules specification. In the pattern, multiform logical time provides the power of parameterization to express safe driving rules, before instantiation in further simulation contexts. We present an efficient way to irregularly update the constraints in the specification due to the context changes, where elements (other cars, road sections, traffic signs) may dynamically enter and exit the scene. In this way, we add constraints for the new elements and remove the constraints related to the disappearing elements rather than rebuild everything. The multi-lane highway scenario is used to illustrate how to irregularly and efficiently update the constraints in the specification while receiving a fresh scene.

Published
2020

39. Early validation of satellite COTS-on-board computing systems

Author

Cuenot, Philippe, Bouche, Paul, De Simone, Robert, Deantoni, Julien, Oueslati, Amin, IRT Saint Exupéry - Institut de Recherche Technologique, Logical Time for Formal Embedded System Design (KAIROS), Inria Sophia Antipolis - Méditerranée (CRISAM), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-COMmunications, Réseaux, systèmes Embarqués et Distribués (Laboratoire I3S - COMRED), Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Université Nice Sophia Antipolis (1965 - 2019) (UNS), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Laboratoire d'Informatique, Signaux, et Systèmes de Sophia Antipolis (I3S), COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA), The authors thank all people and partners involved in the ATIPPIC project managed by IRT Saint-Exupery in Sophia Antipolis, and in INRIA KAIROS team. The work performed in the ATIPPIC project context is supported by the French Research Agency (ANR) and by the industrial partners of IRT Saint-Exupéry Scientific Cooperation Foundation (FCS)., Université Nice Sophia Antipolis (... - 2019) (UNS), and COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-COMUE Université Côte d'Azur (2015-2019) (COMUE UCA)-Centre National de la Recherche Scientifique (CNRS)-Université Côte d'Azur (UCA)-Université Nice Sophia Antipolis (... - 2019) (UNS)

Subjects
Extra-functional properties, Formal analysis, Satellite, COTS, Performance, MBSE, Co-design, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Dependability
Abstract

International audience; The competitive market of nano and micro satellites opens perspectives for use of COTS (Com-mercial Off-The-Shelf) electronic components. Current modular electronics design for embedded On-Board Computing systems (OBC) is being challenged by the integration of flexible Systems on Chip (SoC). The deployment of generic avionics and user/payload functionalities on these components is becoming increasingly complex, while Quality of Service must remain compliant with demanding requirements. It is therefore most important to estimate/evaluate those properties as early as possible, regarding a given ap-plication's deployment on a given COTS-based architecture. Model Based System Engineering (MBSE), while a leading practice in architecture description, may still require further study on its use for early evaluation , especially regarding analysis of emerging behaviors and qualitative model-based mapping of ap-plicative functions onto architectural platform. In this paper, we present methods to enhance MBSE design, helping the designer in evaluating candidate mappings and design choices by providing concrete quality measures. We focus on two aspects that were identified as critical in the ATIPPIC IRT project: first, the cost and conflicts in data communications in on-board and peripheral interconnects, which has a bottleneck impact on mapping choices; second, the availability of functions in case of resource failures (from solar radiations), to validate fault-mitigation techniques and estimate the (un)availability of the OBC system. We illustrate the approach on a simplified satellite model, abstracted from a design conceived in the ATIPPIC IRT project.

Published
2020

43. Contributors

Author

Abdel-Wahab, Omar, Abrahm, Janet L., Abutalib, Syed A., Adams, Sharon, Al Hadidi, Samer, Alcaide, Pilar, Allen, Carl E., Ambinder, Richard F., Amonoo, Hermioni L., Anderson, Julia A.M., Antin, Joseph H., Antony, Aśok C., Araten, David J., Arnold, Donald M., Awan, Farrukh T., Ayers, Emily C., Barth, Peter, Bates, Shannon M., Benz, Edward J., Berliner, Nancy, Bhardwaj, Nina, Bhatia, Smita, Bhatt, Mihir D., Bollard, Catherine M., Bowman, Mackenzie, Boyle, Eileen M., Braun, Benjamin S., Brenner, Malcolm K., Broccoli, Alessandro, Brodsky, Robert A., Brown, Myles, Broxmeyer, Hal E., Brummel-Ziedins, Kathleen, Brunner, Andrew M., Brunstein, Claudio G., Buadi, Francis K., Burkhardt, Birgit, Burns, Melissa A., Bussel, James B., Byrd, John C., Caimi, Paolo F., Camaschella, Clara, Canavan, Michelle, Cantor, Alan B., Capitano, Maegan L., Carcao, Manuel, Carrillo-Farga, Joaquin, Carroll, Michael C., Carson, William E., Carty, Shannon A., Castillo, Jorge J., Chakrabarti, Priyasmita, Chan, Anthony K.C., Chan, Noel C., Chhabra, Saurabh, Chute, John P., Cimen Bozkus, Cansu, Ciurea, Stefan O., Coates, Thomas D., Collins, Graham, Creager, Mark A., Cromwell, Caroline, Crowder, Lauren A., Cushing, Melissa M., Cutler, Corey, Dabaja, Bouthaina, Dave, Sandeep S., De, Caprio, James A., De, Carli, Kathryn, Deininger, Michael W., De, Simone, Robert A., Dinauer, Mary C., Dinner, Shira, Dixit, Karan S., Dogan, Ahmet, Dorshkind, Kenneth, Dotti, Gianpietro, Dror, Yigal, Dunleavy, Kieron, Dvorak, Christopher C., Ebert, Benjamin L., Eck, Michael J., Eckstein, Olive S., Eikelboom, John W., El Jamal, Siraj M., El-Jurdi, Najla, Kim El-Mallawany, Nader, Erba, Harry P., Evans, William E., Feld, Jonathan, Feldman, Alexander, Ferrara, James L., Fischer, Martin, Forbes, Lisa R., Franco, Idalid, Fredenburgh, James C., Frey, Noelle V., Friedman, Kenneth D., Fuller, Stephen J., Gabe, Caroline, Gailani, David, Gallagher, Patrick G., Gallardo-Grajeda, Andrea, Ganz, Tomas, Gee, Adrian P., George, Gemlyn, Gerson, Stanton L., Gertz, Morie A., Ghosh, Nilanjan, Gibson, Christopher J., Ginzburg, Yelena Z., Gomez, Keith, Gotlib, Jason, Grant, Shakira J., Graubert, Timothy A., Gregg, Xylina T., Gribben, John G., Gross, Peter L., Gulati, Nitya, Gurbuxani, Sandeep, Gutierrez, Alejandro, de Haan, Gerald, Haas-Kogan, Daphne, Haddad, Montaser, Halene, Stephanie, Hamadani, Mehdi, Hammond, Rebecca M., Hari, Parameswaran N., Hayman, Suzanne R., Hayward, Catherine, Hebbel, Robert P., Heidenreich, Olaf, Henkin, Stanislav, Hensch, Lisa, Hillis, Christopher, Hillyer, Christopher D., Hoffman, Ronald, Horny, Hans-Peter, Horowitz, Mia, Hsu, Katharine, Hub, Elin, Iancu-Rubin, Camelia, Isenman, David E., Israels, Sara J., Italiano, Joseph E., Jaffe, Elaine S., Jaffer, Iqbal H., Jäger, Ulrich, Jain, Nitin, James, Paula, Jimenez, Alexandra, Jordan, Michael B., Jung, Moonjung, Kager, Leo, Kanakry, Jennifer A., Kanate, Abraham S., Kelly, Kara M., Khandoga, Alexander G., Karsan, Aly, Kaufman, Richard M., Keyzner, Alla, Khanna-Gupta, Arati, Kharchenko, Evgeniya, Klein, Harvey G., Klepin, Heidi D., Anders Kolb, E., Kollet, Orit, Konopleva, Marina, Kontoyiannis, Dimitrios P., Koreth, John, Koretzky, Gary A., Kozieł-Siołkowska, Monika, Kremyanskaya, Marina, Kucine, Nicole, Kumar, Shaji, Küppers, Ralf, Lacy, Martha Q., Ola Landgren, C., Landier, Wendy, Lane, Andrew A., Lane, William J., Langer, Arielle L., Lapidot, Tsvee, Laureano, Marissa, Leblanc, Francis R., Le, Blanc, Thomas W., La, Casce, Ann S., Lee, Daniel W., Lee, Kathleen A., Leung, Wingchi, Levi, Marcel, Lewis, Russell E., Lichtman, Eben I., Lin, Judith C., Lin, Richard J., Lip, Gregory, Poh Loh, Kah, López, José A., Zoref Lorenz, Adi, Loughran, Thomas P., Lu, Sydney X., Lukas, Rimas V., Lulla, Premal, Luscinskas, Francis W., Ma, Alice D., Maakaron, Joseph E., Machlus, Kellie R., Maciejewski, Jaroslaw P., Magenau, John, Majhail, Navneet, Malek, Ehsan, Manis, John P., Mann, Kenneth G., Manno, Catherine S., Marcellino, Bridget K., Marcogliese, Andrea N., Marincola, Francesco M., Mascarenhas, John, Massberg, Steffen, Matino, Davide, Mc, Ever, Rodger P., Mc, Grath, Emer, Mc, Guire, Hilary, S. Mc, Kinney, Matthew, Mehta, Atul, A. Menapace, Laurel, Mentzer, William C., Michel, Marc, Rita Migliaccio, Anna, Mims, Martha P., Moffat, Karen A., Morgan, Gareth J., Najfeld, Vesna, Naymagon, Leonard, Ness, Paul M., Ng, Andrea K., Ning, Shuoyan, Notarangelo, Luigi D., O'Donnell, Martin, Ollila, Thomas A., Ordonez-Moreno, Alejandra, Own, Maryam, Pai, Menaka, Pai, Sung-Yun, Paidas, Michael, Papa, Luena, Papayannopoulou, Thalia, Peng, Cynthia S., Wang Petersdorf, Effie, Pickard, Lucy, Pierce, Glenn F., Pittaluga, Stefania, Porteus, Matthew, Potpara, Tatjana S., Prchal, Josef T., Puigserver, Pere, Vincent Rajkumar, S., Rak, Janusz, Ramos, Carlos A., Rand, Jacob H., Rand, Margaret L., Rao, Dinesh S., Rappazzo, Katherine C., Rau, Rachel E., Ravandi, Farhad, Rawley, Orla, Rawlings, David J., Reddy, Pavan, Reiter, Andreas, Reville, Barbara, Rice, Lawrence, Riese, Matthew J., Rippel, Noa, Riwes, Mary, Roberts, David J., Rodrigue, Bentley B., Rojek, Alexandra E., Roman, Elizabeth, Rossmann, Marlies P., Rot, Antal, Rouce, Rayne H., Rowley, Scott D., Rustad, Even H., Sahni, Gagan, Sahoo, Daisy, Salama, Mohamed E., Samji, Nasrin, Scadden, David, Schiffman, Fred J., Schipperus, Martin R., Schrier, Stanley L., Shaz, Beth H., Shelburne, Samuel A., Sheth, Sujit, Sholevar, Roxanne, Silberstein, Lev, Silverman, Lewis B., Silverstein, Roy L., Skeith, Leslie, Sloan, Steven R., Douglas Smith, Stephen, Steensma, David P., Steinberg, Martin H., Stieglitz, Elliot, Stock, Wendy, Storry, Jill R., Stramer, Susan L., Strati, Paolo, Stroncek, David F., Flohr Svendsen, Arthur, Sweetenham, John W., Tebaldi, Toma, Teegavarapu, Sravanti P., Tewari, Alok, Lay Thein, Swee, Tillman, Benjamin F., Tomlinson, Benjamin, Tremblay, Douglas, Treon, Steven P., Tsai, Frederick D., Tsang, Mazie, Tzannou, Ifigeneia, Usmani, Saad Z., Valent, Peter, Venkataraman, Girish, Venugopal, Sangeetha, M. Vercellotti, Gregory, Viero, Gabriella, von Andrian, Ulrich H., Vose, Julie M., Wagner, Andrew J., Wang, Ena, Wang, Jia-huai, Warkentin, Theodore E., Weitz, Jeffrey I., West, Kamille A., Westhoff, Connie M., Wheeler, Allison P., Wierda, William, Wiersum-Osselton, Johanna C., Wiley, James S., Williams, David A., Wolgast, Lucia R., Yang, Daozheng, Yang, Moua, Younes, Anas, Young, Neal S., Zayac, Adam S., Zeller, Michelle P., Zieske, Arthur W., Zimran, Ari, Luigi Zinzani, Pier, C. Zubair, Abba, and Michel Zwaan, C.

Published
2023
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