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This work presents the development of an embedded platform using Field Programmable Gate Arrays (FPGAs) for real-time simulation of dynamic systems in industrial plants. The platform, Real-Time Simulator for Dynamic Systems in FPGA (RTSDS-FPGA), is designed for industrial and academic applications. In industrial contexts, the RTSDS-FPGA facilitates the optimization and tuning of embedded control algorithms, while in academia, it supports research on new embedded solutions in automation and control. It is also an educational tool for undergraduate and postgraduate students developing embedded control system projects. Additionally, the simulator accelerates the simulation of slow dynamic systems, significantly reducing overall simulation time. Experimental results demonstrate the platform's capability to perform real-time simulations effectively, validating its accuracy and performance through comparative analyses with established software tools such as Matlab/Simulink. [ABSTRACT FROM AUTHOR]

This paper presents a fuzzy logic-based approach for replica scaling in a Kubernetes environment, focusing on integrating Edge Computing. The proposed FHS (Fuzzy-based Horizontal Scaling) system was compared to the standard Kubernetes scaling mechanism, HPA (Horizontal Pod Autoscaler). The comparison considered resource consumption, the number of replicas used, and adherence to latency Service-Level Agreements (SLAs). The experiments were conducted in an environment simulating Edge Computing infrastructure, with virtual machines used to represent edge nodes and traffic generated via JMeter. The results demonstrate that FHS achieves a reduction in CPU consumption, uses fewer replicas under the same stress conditions, and exhibits more distributed SLA latency violation rates compared to HPA. These results indicate that FHS offers a more efficient and customizable solution for replica scaling in Kubernetes within Edge Computing environments, contributing to both operational efficiency and service quality. [ABSTRACT FROM AUTHOR]

This work proposes an implementation of the SHA-256, the most common blockchain hash algorithm, on a field-programmable gate array (FPGA) to improve processing capacity and power saving in Internet of Things (IoT) devices to solve security and privacy issues. This implementation presents a different approach than other papers in the literature, using clustered cores executing the SHA-256 algorithm in parallel. Details about the proposed architecture and an analysis of the resources used by the FPGA are presented. The implementation achieved a throughput of approximately 1.4 Gbps for 16 cores on a single FPGA. Furthermore, it saved dynamic power, using almost 1000 times less compared to previous works in the literature, making this proposal suitable for practical problems for IoT devices in blockchain environments. The target FPGA used was the Xilinx Virtex 6 xc6vlx240t-1ff1156. [ABSTRACT FROM AUTHOR]

The literature on ECG delineation algorithms has seen significant growth in recent decades. However, several challenges still need to be addressed. This work aims to propose a lightweight R-peak-detection algorithm that does not require pre-setting and performs classification on a sample-by-sample basis. The novelty of the proposed approach lies in the utilization of the typicality eccentricity detection anomaly (TEDA) algorithm for R-peak detection. The proposed method for R-peak detection consists of three phases. Firstly, the ECG signal is preprocessed by calculating the signal's slope and applying filtering techniques. Next, the preprocessed signal is inputted into the TEDA algorithm for R-peak estimation. Finally, in the third and last step, the R-peak identification is carried out. To evaluate the effectiveness of the proposed technique, experiments were conducted on the MIT-BIH arrhythmia database (MIT-AD) for R-peak detection and validation. The results of the study demonstrated that the proposed evolutive algorithm achieved a sensitivity (Se in %), positive predictivity (+P in %), and accuracy (ACC in %) of 95.45%, 99.61%, and 95.09%, respectively, with a tolerance (TOL) of 100 milliseconds. One key advantage of the proposed technique is its low computational complexity, as it is based on a statistical framework calculated recursively. It employs the concepts of typicity and eccentricity to determine whether a given sample is normal or abnormal within the dataset. Unlike most traditional methods, it does not require signal buffering or windowing. Furthermore, the proposed technique employs simple decision rules rather than heuristic approaches, further contributing to its computational efficiency. [ABSTRACT FROM AUTHOR]