1. Design of a 3780-point IFFT Processor for TDS-OFDM
- Author
-
Yang, Zhi-Xing, Hu, Yu-Peng, Pan, Chang-Yong, and Yang, Lin
- Subjects
Signal processing -- Equipment and supplies ,High-definition television -- Research ,Signal to noise ratio -- Evaluation ,Business ,Electronics ,Mass communications - Abstract
This correspondence presents a design of 3780-point IFFT Processor for TDS-OFDM terrestrial DTV transmitter using FPGA. It demonstrates the algorithm design and error analysis of the processor, which can achieve a throughput of 7.56M complex IFFT operations per second. This design meets the signal-to-quantization noise ratio requirement of the TDS-OFDM system. It consists of two FPGA and one dual-port RAM. The data stream pipeline algorithm is implemented. Index Terms--Circuit optimization, FFT, HDTV, pipeline processing, signal processing.
- Published
- 2002