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1. Analog In-Memory Computing Attention Mechanism for Fast and Energy-Efficient Large Language Models

Author

Leroux, Nathan, Manea, Paul-Philipp, Sudarshan, Chirag, Finkbeiner, Jan, Siegel, Sebastian, Strachan, John Paul, and Neftci, Emre

Subjects
Computer Science - Neural and Evolutionary Computing, Computer Science - Artificial Intelligence, Computer Science - Hardware Architecture, Computer Science - Emerging Technologies
Abstract

Transformer neural networks, driven by self-attention mechanisms, are core components of foundational and Large Language Models. In generative transformers, self-attention uses cache memory to store token projections, avoiding recomputation at each time step. However, GPU-stored projections must be loaded into SRAM for each new generation step, causing latency and energy bottlenecks for long sequences. In this work, we propose a fast and energy-efficient hardware implementation of self-attention using analog in-memory computing based on gain cell memories. Volatile gain cell memories can be efficiently written to store new tokens during sequence generation, while performing analog signed weight multiplications to compute the dot-products required for self-attention. We implement Sliding Window Attention, which keeps memory of a finite set of past steps. A charge-to-pulse converter for array readout eliminates the need for analog-to-digital conversion between self-attention stages. Using a co-designed initialization algorithm to adapt pre-trained weights to gain cell non-idealities, we achieve NLP performance comparable to ChatGPT-2 with minimal training iterations, despite hardware constraints. Our end-to-end hardware design includes digital controls, estimating area, latency, and energy. The system reduces attention latency by up to two orders of magnitude and energy consumption by up to five orders compared to GPUs, marking a significant step toward ultra-fast, low-power sequence generation in Large Language Models., Comment: 25 pages, 6 figures, 1 table

Published
2024

2. Synaptogen: A cross-domain generative device model for large-scale neuromorphic circuit design

Author

Hennen, Tyler, Brackmann, Leon, Ziegler, Tobias, Siegel, Sebastian, Menzel, Stephan, Waser, Rainer, Wouters, Dirk J., and Bedau, Daniel

Subjects
Computer Science - Neural and Evolutionary Computing, Condensed Matter - Materials Science, Electrical Engineering and Systems Science - Signal Processing
Abstract

We present a fast generative modeling approach for resistive memories that reproduces the complex statistical properties of real-world devices. To enable efficient modeling of analog circuits, the model is implemented in Verilog-A. By training on extensive measurement data of integrated 1T1R arrays (6,000 cycles of 512 devices), an autoregressive stochastic process accurately accounts for the cross-correlations between the switching parameters, while non-linear transformations ensure agreement with both cycle-to-cycle (C2C) and device-to-device (D2D) variability. Benchmarks show that this statistically comprehensive model achieves read/write throughputs exceeding those of even highly simplified and deterministic compact models., Comment: This work has been submitted to the IEEE for possible publication. Code is available at https://zenodo.org/doi/10.5281/zenodo.10942560

Published
2024

3. The Ouroboros of Memristors: Neural Networks Facilitating Memristor Programming

Author

Yu, Zhenming, Yang, Ming-Jay, Finkbeiner, Jan, Siegel, Sebastian, Strachan, John Paul, and Neftci, Emre

Subjects
Computer Science - Emerging Technologies
Abstract

Memristive devices hold promise to improve the scale and efficiency of machine learning and neuromorphic hardware, thanks to their compact size, low power consumption, and the ability to perform matrix multiplications in constant time. However, on-chip training with memristor arrays still faces challenges, including device-to-device and cycle-to-cycle variations, switching non-linearity, and especially SET and RESET asymmetry. To combat device non-linearity and asymmetry, we propose to program memristors by harnessing neural networks that map desired conductance updates to the required pulse times. With our method, approximately 95% of devices can be programmed within a relative percentage difference of +-50% from the target conductance after just one attempt. Our approach substantially reduces memristor programming delays compared to traditional write-and-verify methods, presenting an advantageous solution for on-chip training scenarios. Furthermore, our proposed neural network can be accelerated by memristor arrays upon deployment, providing assistance while reducing hardware overhead compared with previous works. This work contributes significantly to the practical application of memristors, particularly in reducing delays in memristor programming. It also envisions the future development of memristor-based machine learning accelerators., Comment: This work is accepted at the 2024 IEEE AICAS

Published
2024
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4. Work-in-Progress: A Universal Instrumentation Platform for Non-Volatile Memories

Author

Staudigl, Felix, Hossein, Mohammed, Ziegler, Tobias, Indari, Hazem Al, Pelke, Rebecca, Siegel, Sebastian, Wouters, Dirk J., Sisejkovic, Dominik, Joseph, Jan Moritz, and Leupers, Rainer

Subjects
Computer Science - Hardware Architecture, Computer Science - Computers and Society
Abstract

Emerging non-volatile memories (NVMs) represent a disruptive technology that allows a paradigm shift from the conventional von Neumann architecture towards more efficient computing-in-memory (CIM) architectures. Several instrumentation platforms have been proposed to interface NVMs allowing the characterization of single cells and crossbar structures. However, these platforms suffer from low flexibility and are not capable of performing CIM operations on NVMs. Therefore, we recently designed and built the NeuroBreakoutBoard, a highly versatile instrumentation platform capable of executing CIM on NVMs. We present our preliminary results demonstrating a relative error < 5% in the range of 1 k$\Omega$ to 1 M$\Omega$ and showcase the switching behavior of a HfO$_2$/Ti-based memristive cell.

Published
2023

5. Sequence learning in a spiking neuronal network with memristive synapses

Author

Bouhadjar, Younes, Siegel, Sebastian, Tetzlaff, Tom, Diesmann, Markus, Waser, Rainer, and Wouters, Dirk J.

Subjects
Computer Science - Neural and Evolutionary Computing, Computer Science - Emerging Technologies
Abstract

Brain-inspired computing proposes a set of algorithmic principles that hold promise for advancing artificial intelligence. They endow systems with self learning capabilities, efficient energy usage, and high storage capacity. A core concept that lies at the heart of brain computation is sequence learning and prediction. This form of computation is essential for almost all our daily tasks such as movement generation, perception, and language. Understanding how the brain performs such a computation is not only important to advance neuroscience but also to pave the way to new technological brain-inspired applications. A previously developed spiking neural network implementation of sequence prediction and recall learns complex, high-order sequences in an unsupervised manner by local, biologically inspired plasticity rules. An emerging type of hardware that holds promise for efficiently running this type of algorithm is neuromorphic hardware. It emulates the way the brain processes information and maps neurons and synapses directly into a physical substrate. Memristive devices have been identified as potential synaptic elements in neuromorphic hardware. In particular, redox-induced resistive random access memories (ReRAM) devices stand out at many aspects. They permit scalability, are energy efficient and fast, and can implement biological plasticity rules. In this work, we study the feasibility of using ReRAM devices as a replacement of the biological synapses in the sequence learning model. We implement and simulate the model including the ReRAM plasticity using the neural simulator NEST. We investigate the effect of different device properties on the performance characteristics of the sequence learning model, and demonstrate resilience with respect to different on-off ratios, conductance resolutions, device variability, and synaptic failure., Comment: 23 pages, 13 Figures

Published
2022

11. Detection of shockable heart rhythms with convolutional neural networks : Based on ECG spectrograms

Author

Siegel, Sebastian, Lääketieteen ja terveysteknologian tiedekunta - Faculty of Medicine and Health Technology, and Tampere University

Subjects
automated external defibrillator, AED, cardiac arrhythmia, cardiac arrest, convolutional neural network, CNN, defibrillation, ECG data analysis, feature extraction, deep learning, residual neural network, ResNet, shockable, shockable heart rhythms, spectrogram, wavelet transform [Keywords], neural networks (information technology), automated pattern recognition, machine learning, heart diseases, databases, ECG, medicine (science), deep learning, cardiac arrest, arrhythmias, Master's Programme in Biomedical Sciences and Engineering
Abstract

Purpose Automated feature extraction combined with deep learning has had and continues to have a strong impact on the improvement and implementation of pattern recognition driven by machine learning. Systems without prior expertise about a problem but with the ability to iteratively learn strategies to solve problems, tend to outperform concepts of manual feature engineering in vari-ous fields. In ECG data analysis as well as in other medical domains, models based on manual feature extraction are tedious to develop, require scientific expertise, and are oftentimes not easily adaptive to variations of the problem to be solved. This work aims to examine automated feature extraction and classification of ECG data, specifically of shockable heart rhythms, with convolu-tional neural networks and residual neural networks. The precise and rapid determination of shockable cardiac conditions is a decisive step to improve the chances of survival for patients having a sudden cardiac arrest. Conventional, commercially available automated external defib-rillators (AEDs) deploy algorithms based on manual feature extraction. Approximately 1 out of 10 shockable conditions is not recognized by the AED. Consequently, strategies for improvement need to be explored. Methods 125 ECG recordings from four annotated cardiac arrhythmia databases (American Heart Association Database, Creighton University Tachyarrhythmia Database, MIT-BIH Arrhythmia Da-tabase, MIT-BIH Malignant Ventricular Arrhythmia Database) with a duration of 30 mins or 8 mins (Creighton University Tachyarrhythmia Database) per recording were processed. Shockable con-ditions are identified as ventricular tachycardia, ventricular fibrillation, and ventricular flutter. The 1 channel ECG recordings (modified limb lead II) were normalized to 250 Hz sampling frequency, high-pass filtered (1 Hz cutoff and 0.85 filter steepness), second order Butterworth low-pass fil-tered (30 Hz cutoff), and notch filtered at 50 Hz. Consistent wavelet transformation with 5 octaves, 20 voices per octave, and a time bandwidth product parameter of 50 was applied to generate greyscale spectrogram representations of the ECG data (pixel value range from 0 to 255). The recordings were segmented into 3 s segments. Data augmentation around the borders of shock-able episodes and along shockable episodes was carried out to create balanced datasets con-sisting of 60340 samples. 45% of samples in the balanced dataset contain shockable rhythms with more than 60% temporal prevalence within each sample. Conventional convolutional neural networks and residual neural networks with varying architectures and hyperparameter settings were trained and evaluated on balanced datasets (train/val/test: 70/15/15). The approach focused on examining a broader range of parameter settings and model architectures rather than optimiz-ing a specific configuration. The best performing model was evaluated in a 5-fold cross-validation. Exemplarily, a leave-one-subject-out cross-validation was deployed with 3 randomly chosen re-cordings, with the constraints that each subject must come from a different database and contain a different shockable condition. Results and Conclusion The best performing model was a residual neural network with 96 residual blocks. The 5-fold cross-validation results on average in an accuracy of 0.987, a sensitivity of 0.992 on shock-able rhythms, and a specificity of 0.984 for non-shockable rhythms on the test sets. The ROC AUC score is 0.998 on average. The 3-fold leave-one-subject-out cross-validation reaches on average an accuracy of 0.984, a sensitivity of 0.984, and a specificity of 0.980. The ROC AUC score reaches 0.997 on average. The analysis of misclassified segments reveals that the classi-fier performs less accurately on border segments containing a shockable and at least one non-shockable rhythm. While the test set contains 4.73% border segments, the set of misclassified samples includes 11.29% border segments. The label distributions of the test set and the set of misclassified samples show that segments annotated as “not defined” (ND) and “ventricular fibril-lation or flutter” (VF-VFL) are significantly more prevalent in the set of misclassified samples. Histogram analysis, referring to the mean pixel intensity of the spectrograms, indicates that the classifier works less accurately on spectrograms with mean pixel values below 2 (practically flat-line signals or signals with very small amplitude). The results indicate that it is possible to improve the analysis of ECG data by deploying automated feature detection combined with artificial neural networks. The methods presented in this work are not restricted to the detection of shockable cardiac arrhythmias, they likewise em-phasize the potential of machine learning in the domain of biosignal analysis and correlated med-ical data. In the next step, the approach needs to be verified on a broader database. The tech-nology can even help create more comprehensive databases of clinical ECG data by supporting automated annotation.

Published
2023

13. Efficient Realization of Data Dependencies in Algorithm Partitioning Under Resource Constraints

Author

Siegel, Sebastian, Merker, Renate, Hutchison, David, editor, Kanade, Takeo, editor, Kittler, Josef, editor, Kleinberg, Jon M., editor, Mattern, Friedemann, editor, Mitchell, John C., editor, Naor, Moni, editor, Nierstrasz, Oscar, editor, Pandu Rangan, C., editor, Steffen, Bernhard, editor, Sudan, Madhu, editor, Terzopoulos, Demetri, editor, Tygar, Dough, editor, Vardi, Moshe Y., editor, Weikum, Gerhard, editor, Nagel, Wolfgang E., editor, Walter, Wolfgang V., editor, and Lehner, Wolfgang, editor

Published
2006
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18. Synaptic and neuromorphic functions: general discussion

Author

Berg, Sanne, Brivio, Stefano, Brown, Simon, Burr, Geoffrey, Deswal, Sweety, Deuermeier, Jonas, Gale, Ella, Hwang, Hyunsang, Ielmini, Daniele, Indiveri, Giacomo, Kenyon, Tony, Kiazadeh, Asal, Köymen, Itir, Kozicki, Michael, Li, Yang, Mannion, Daniel, Prodromakis, Themis, Ricciardi, Carlo, Siegel, Sebastian, Speckbacher, Maximilian, Valov, Ilia, Wang, Wei, Williams, Stanley, Wouters, Dirk, Yang, Yuchao, Berg, Sanne, Brivio, Stefano, Brown, Simon, Burr, Geoffrey, Deswal, Sweety, Deuermeier, Jonas, Gale, Ella, Hwang, Hyunsang, Ielmini, Daniele, Indiveri, Giacomo, Kenyon, Tony, Kiazadeh, Asal, Köymen, Itir, Kozicki, Michael, Li, Yang, Mannion, Daniel, Prodromakis, Themis, Ricciardi, Carlo, Siegel, Sebastian, Speckbacher, Maximilian, Valov, Ilia, Wang, Wei, Williams, Stanley, Wouters, Dirk, and Yang, Yuchao

Published
2019

19. Exploring Area-Dependent Pr0.7Ca0.3MnO3-Based Memristive Devices as Synapses in Spiking and Artificial Neural Networks.

Author

Gutsche, Alexander, Siegel, Sebastian, Zhang, Jinchao, Hambsch, Sebastian, and Dittmann, Regina

Subjects
ARTIFICIAL neural networks, SYNAPSES, NEURAL circuitry, PATTERN recognition systems, ELECTRONIC equipment
Abstract

Memristive devices are novel electronic devices, which resistance can be tuned by an external voltage in a non-volatile way. Due to their analog resistive switching behavior, they are considered to emulate the behavior of synapses in neuronal networks. In this work, we investigate memristive devices based on the field-driven redox process between the p-conducting Pr0.7Ca0.3MnO3 (PCMO) and different tunnel barriers, namely, Al2O3, Ta2O5, and WO3. In contrast to the more common filamentary-type switching devices, the resistance range of these area-dependent switching devices can be adapted to the requirements of the surrounding circuit. We investigate the impact of the tunnel barrier layer on the switching performance including area scaling of the current and variability. Best performance with respect to the resistance window and the variability is observed for PCMO with a native Al2O3 tunnel oxide. For all different layer stacks, we demonstrate a spike timing dependent plasticity like behavior of the investigated PCMO cells. Furthermore, we can also tune the resistance in an analog fashion by repeated switching the device with voltage pulses of the same amplitude and polarity. Both measurements resemble the plasticity of biological synapses. We investigate in detail the impact of different pulse heights and pulse lengths on the shape of the stepwise SET and RESET curves. We use these measurements as input for the simulation of training and inference in a multilayer perceptron for pattern recognition, to show the use of PCMO-based ReRAM devices as weights in artificial neural networks which are trained by gradient descent methods. Based on this, we identify certain trends for the impact of the applied voltages and pulse length on the resulting shape of the measured curves and on the learning rate and accuracy of the multilayer perceptron. [ABSTRACT FROM AUTHOR]

Published
2021
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20. Synaptic and neuromorphic functions: general discussion

Author

Berg, Alexandra I., primary, Brivio, Stefano, additional, Brown, Simon, additional, Burr, Geoffrey, additional, Deswal, Sweety, additional, Deuermeier, Jonas, additional, Gale, Ella, additional, Hwang, Hyunsang, additional, Ielmini, Daniele, additional, Indiveri, Giacomo, additional, Kenyon, Anthony J., additional, Kiazadeh, Asal, additional, Köymen, Itir, additional, Kozicki, Michael, additional, Li, Yang, additional, Mannion, Daniel, additional, Prodromakis, Themis, additional, Ricciardi, Carlo, additional, Siegel, Sebastian, additional, Speckbacher, Maximilian, additional, Valov, Ilia, additional, Wang, Wei, additional, Williams, R. Stanley, additional, Wouters, Dirk, additional, and Yang, Yuchao, additional

Published
2019
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21. Trade‐Off Between Data Retention and Switching Speed in Resistive Switching ReRAM Devices.

Author

Siegel, Sebastian, Baeumer, Christoph, Gutsche, Alexander, Witzleben, Moritz, Waser, Rainer, Menzel, Stephan, and Dittmann, Regina

Subjects
RECORDS management, OXIDE electrodes, SPEED, EXCHANGE reactions, DATA warehousing
Abstract

Memristive switching devices are promising for future data storage and neuromorphic computing applications to overcome the scaling and power dissipation limits of classical CMOS technology. Many groups have engineered bilayer oxide structures to enhance the switching performance especially in terms of retention and device reliability. Here, introducing retention enhancement oxide layers into the memristive stack is shown to result in a reduction of the switching speed not only by changing the voltage and temperature distribution in the cell, but also by influencing the rate‐limiting‐step of the switching kinetics. In particular, it is demonstrated that by introducing a retention enhancement layer into resistive switching SrTiO3 devices, the kinetics are no longer determined by the interface exchange reaction between switching oxide and active electrode, but depend on the oxygen ion migration in the additional interface layer. Thus, the oxygen migration barrier in the additional layer determines the switching speed. This trade‐off between retention and switching speed is of general importance for rational engineering of memristive devices. [ABSTRACT FROM AUTHOR]

Published
2021
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22. SYMPAD - A Class Library for Processing Parallel Algorithm Specifications

Author

Rullmann, Markus, Schaffer, Rainer, Siegel, Sebastian, Merker, Renate, and Hardt, Wolfram

Subjects
model transformations of parallel algorithms, ddc:500, ddc:004, Systementwurf, class of affine indexed algorithms, operation representation in polytope space, Parallelverarbeitung, design flow
Abstract

In this paper we introduce a new class library to model transformations of parallel algorithms. SYMPAD serves as a basis to develop automated tools and methods to generate efficient implementations of such algorithms. The paper gives an overview over the general structure, as well as features of the library. We further describe the fundamental design process that is controlled by our developed methods.

Published
2007

23. Massively Parallel Processor Architectures: A Co-design Approach

Author

Dutta, Hritam, Hannig, Frank, Kupriyanov, Alexey, Kissler, Dmitrij, Teich, Jürgen, Schaffer, Rainer, Siegel, Sebastian, Merker, Renate, Pottier, Bernard, Department of Computer Science 12, Hardware-Software-Co-Design (CS 12), University of Erlangen-Nuremberg, Institute of Circuits and Systems [Dresden] (ICS), Technische Universität Dresden (TUD), Lab-STICC_UBO_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Fabiani, Erwan, Friedrich-Alexander Universität Erlangen-Nürnberg (FAU), and Technische Universität Dresden = Dresden University of Technology (TU Dresden)

Published
2007

24. Co-Design of Massively Parallel Embedded Processor Architectures

Author

Hannig, Frank, Dutta, Hritam, Kupriyanov, Alexey, Teich, Jürgen, Schaffer, Rainer, Siegel, Sebastian, Merker, Renate, Keryell, Ronan, Pottier, Bernard, Chillet, Daniel, Ménard, Daniel, Sentieys, Olivier, Department of Computer Science 12, Hardware-Software-Co-Design (CS 12), Friedrich-Alexander Universität Erlangen-Nürnberg (FAU), Institute of Circuits and Systems [Dresden] (ICS), Technische Universität Dresden = Dresden University of Technology (TU Dresden), Laboratoire Informatique et Télécommunications (LIT), Ecole Nationale Supérieure des Télécommunications de Bretagne, Lab-STICC_UBO_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Reconfigurable and Retargetable Digital Devices (R2D2), Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes 1 (UR1), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-INRIA Rennes, Institut National de Recherche en Informatique et en Automatique (Inria)-École Nationale Supérieure des Sciences Appliquées et de Technologie (ENSSAT), University of Erlangen-Nuremberg, Technische Universität Dresden (TUD), Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-INRIA Rennes, and Fabiani, Erwan

Published
2005

25. A riot of diets: what works, what doesn't

Author

Whyte, John and Siegel, Sebastian

Subjects
Reducing diets -- Reports, Health, Reports
Abstract

One third of all American adults (more than 70 million people) are currently on a diet. More than half of all adults have attempted dieting at some point--often more than [...]

Published
2005

26. SYMPAD - A Class Library for Processing Parallel Algorithm Specifications

Author

Hardt, Wolfram, Rullmann, Markus, Schaffer, Rainer, Siegel, Sebastian, Merker, Renate, Hardt, Wolfram, Rullmann, Markus, Schaffer, Rainer, Siegel, Sebastian, and Merker, Renate

Abstract

In this paper we introduce a new class library to model transformations of parallel algorithms. SYMPAD serves as a basis to develop automated tools and methods to generate efficient implementations of such algorithms. The paper gives an overview over the general structure, as well as features of the library. We further describe the fundamental design process that is controlled by our developed methods.

Published
2007

28. Efficient Realization of Data Dependencies in Algorithm Partitioning Under Resource Constraints.

Author

Nagel, Wolfgang E., Walter, Wolfgang V., Lehner, Wolfgang, Siegel, Sebastian, and Merker, Renate

Abstract

Mapping algorithms to parallel architectures efficiently is very important for a cost-effective design of many modern technical products. In this paper, we present a solution to the problem of efficiently realizing uniform data dependencies on processor arrays. In contrary to existing approaches, we formulate an optimization problem to consider the cost of both: channels and registers. Further, a solution to the optimization problem assigns which channels shall be implemented and it specifies the control for the realization of the uniform data dependencies. We illustrate our method on the edge detection algorithm. [ABSTRACT FROM AUTHOR]

Published
2006
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29. Exploring Area-Dependent Pr 0.7 Ca 0.3 MnO 3 -Based Memristive Devices as Synapses in Spiking and Artificial Neural Networks.

Author

Gutsche A, Siegel S, Zhang J, Hambsch S, and Dittmann R

Abstract

Memristive devices are novel electronic devices, which resistance can be tuned by an external voltage in a non-volatile way. Due to their analog resistive switching behavior, they are considered to emulate the behavior of synapses in neuronal networks. In this work, we investigate memristive devices based on the field-driven redox process between the p-conducting Pr 0.7 Ca 0.3 MnO 3 (PCMO) and different tunnel barriers, namely, Al 2 O 3 , Ta 2 O 5 , and WO 3 . In contrast to the more common filamentary-type switching devices, the resistance range of these area-dependent switching devices can be adapted to the requirements of the surrounding circuit. We investigate the impact of the tunnel barrier layer on the switching performance including area scaling of the current and variability. Best performance with respect to the resistance window and the variability is observed for PCMO with a native Al 2 O 3 tunnel oxide. For all different layer stacks, we demonstrate a spike timing dependent plasticity like behavior of the investigated PCMO cells. Furthermore, we can also tune the resistance in an analog fashion by repeated switching the device with voltage pulses of the same amplitude and polarity. Both measurements resemble the plasticity of biological synapses. We investigate in detail the impact of different pulse heights and pulse lengths on the shape of the stepwise SET and RESET curves. We use these measurements as input for the simulation of training and inference in a multilayer perceptron for pattern recognition, to show the use of PCMO-based ReRAM devices as weights in artificial neural networks which are trained by gradient descent methods. Based on this, we identify certain trends for the impact of the applied voltages and pulse length on the resulting shape of the measured curves and on the learning rate and accuracy of the multilayer perceptron., Competing Interests: The authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest., (Copyright © 2021 Gutsche, Siegel, Zhang, Hambsch and Dittmann.)

Published
2021
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