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This article discusses the design and optimization of a unique high-temperature superconducting (HTS) air-core pulse transformer for the new class of dc series-type hybrid circuit breakers (S-HCBs) operating in the liquid nitrogen under cryogenic environment. The HTS secondary windings of the new pulse transformer carry a dc load current offering ultralow power loss during the normal operation unlike the conventional solid state circuit breakers. Unlike the prior-art HTS power transformers and the superconducting fault current limiters, the new pulse HTS transformer is uniquely designed to prevent the HTS tapes from quenching despite the set of constraints imposed by the S-HCB operation including a large pulse current up to 6 kA and high mechanical stress. A new transformer optimization methodology is proposed using the genetic algorithm in MATLAB coupled with Simulink and a finite element model in COMSOL to find the optimal transformer design meeting the overall 10 kV/150 A S-HCB design requirements within the electromagnetic constraints of the HTS. A 10 kV/150 A HTS transformer prototype is built and the electrical parameters are measured and found consistent with the simulated parameters. The S-HCB with the HTS transformer is tested at 600 V/30 A and 5 kV/150 A to validate the design. The experimental and COMSOL simulation results showed the successful operation of the HTS transformer and the fault currents of 30 and 150 A were forced down to zero within ${\text{10}}\,\mu \text{s}$ and remain as a small ripple current for ${\text{200}}\,\mu \text{s}$ before a series mechanical switch opens arclessly and with no damage caused to the HTS windings.

In this article, a series hybrid circuit breaker based on a flying capacitor multilevel injector (FCM-SHCB) is proposed for MVDC and LVDC, which utilizes the multilevel characteristic of FCM to realize the fault-current-limitation modulation and extend operation windows for mechanical switch (MS). Meanwhile, by fully exploring the redundant states of the FCM structure, the proposed FCM-SHCB can avoid the high-frequency operation of one single device in conventional S-HCBs, realizing balanced switching operation of the power semiconductor devices and reducing switching frequency without sacrificing the injection performance. The operation principle and parameters design consideration are detailed. A proof-of-concept FCM-SHCB prototype experimentally demonstrates the proposed solution can maintain the high-speed fault-current breaking ability (150 V/15 A/ $6~\mu $ s) while obtaining balanced switching operation (half-reduced switching frequency) and current limiting capability.

DC-DC converters used in on-board chargers (OBC) of electric vehicles need to meet the requirements of high efficiency, wide output range, and electrical isolation. In this article, a partial-power processing topology with a wide output range is proposed to overcome the drawbacks of traditional single-stage and two-stage LLC converters. The LLC resonant converter operates near the resonant frequency to maintain high efficiency. While only the partial power is processed by the Buck converter to offer the wide-range output voltage capability. The triangular current mode (TCM) operation is implemented in the Buck converter to minimize the efficiency sacrifice. In addition, to reduce the adverse effect of the second harmonic voltage ripple (SHVR) generated by the AC port on the LLC resonant converter in OBC. A ripple compensation method is proposed to eliminate the SHVR of the LLC resonance converter. Through the dual predictive control for the Buck converter, the SHVR of the LLC resonant converter is offset by the Buck converter. A 2 kW rated experimental prototype is designed to convert 400 V wide input to 200-500 V output. The prototype demonstrates more than 96% efficiency from 30% load to full load at 60-120 V input and a 98.2% peak efficiency.

The Si/WBG hybrid half-bridge (HHB) converter with hybrid frequency interleaved operation (HFIO) aims to offer an improved cost-performance tradeoff but suffers from uncompensable and low-frequency fluctuations in power quality issues and complicated control design. In this article, an Si/wide-bandgap (WBG) coupled half-bridge (CHB) is proposed, which coordinates the hybrid-frequency interleaved Si and WBG phase operation by a coupled inductor. By optimal configuring the coupling coefficient, the un-compensable, and low-frequency fluctuations of power quality issues can be completely addressed. Meanwhile, the HFIO controller is redesigned from the perspective of the modulated model predictive control, and the implementation can be greatly simplified under the selected optimal coefficient. A 3.3 kW Si insulated gate bipolar transistor (IGBT)/SiC mosfet CHB totem-pole bridgeless PFC (TPBPFC) prototype is built as a case study to validate the proposed design concept. In comparison to conventional Si/SiC HHB TPBPFC, the proposed Si/SiC CHB TPBPFC can achieve a maximum 64.7% total harmonic distortion (THD) reduction, demonstrating the same low ripple and THD performance as full high-frequency two-phase all-SiC design in all operating ranges while with 16.7% cost reduction.

The Si/wide bandgap (WBG) hybrid half-bridge (HHB) coordinates the hybrid-frequency operation and power-sharing ratio between the low-frequency Si phase and the high-frequency WBG phase to offer the same WBG benefits but with a much-reduced cost, in comparison to a full WBG solution. However, no generalized methodology has been reported so far to realize the full-scale optimization of switching frequency and the power-sharing ratio between those phases. In this article, we first develop a generalized power loss model for Si/WBG HHB with total power loss as output and switching frequency and power-sharing ratio as a continuous input variable. And then develop a dynamic power-sharing ratio and switching frequency control to achieve minimum power loss over a wide load range. A 3-kW prototype of the Si/SiC HHB-based dc/dc converter is built to validate the power loss model and proposed control strategy. In comparison with several fixed parameters, the dynamic parameters obtained by the proposed power loss model achieve a 6%–18% total power loss reduction without sacrificing power quality performance.