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Artificial intelligence (AI) has seen remarkable advancements across various domains, including natural language processing, computer vision, autonomous vehicles, and biology. However, the rapid expansion of AI technologies has escalated the demand for more powerful computing resources. As digital computing approaches fundamental limits, neuromorphic photonics emerges as a promising platform to complement existing digital systems. In neuromorphic photonic computing, photonic devices are controlled using analog signals. This necessitates the use of digital-to-analog converters (DAC) and analog-to-digital converters (ADC) for interfacing with these devices during inference and training. However, data movement between memory and these converters in conventional von Neumann computing architectures consumes energy. To address this, analog memory co-located with photonic computing devices is proposed. This approach aims to reduce the reliance on DACs and ADCs and minimize data movement to enhance compute efficiency. This paper demonstrates a monolithically integrated neuromorphic photonic circuit with co-located capacitive analog memory and compares various analog memory technologies for neuromorphic photonic computing using the MNIST dataset as a benchmark., Comment: 22 pages, 10 figures

Advances in silicon photonics technology have enabled the field of neuromorphic photonics, where analog neuron-like processing elements are implemented in silicon photonics technology. Accurate and scalable simulation tools for photonic integrated circuits are critical for designing neuromorphic photonic circuits. This is especially important when designing networks with recurrent connections, where the dynamics of the system may give rise to unstable and oscillatory solutions which need to be accurately modelled. These tools must simultaneously simulate the analog electronics and the multi-channel (wavelength-division-multiplexed) photonics contained in a photonic neuron to accurately predict on-chip behaviour. In this paper, we utilize a Verilog-A model of the photonic neural network to investigate the dynamics of recurrent integrated circuits. We begin by reviewing the theory of continuous-time recurrent neural networks as dynamical systems and the relation of these dynamics to important physical features of photonic neurons such as cascadability. We then present the neural dynamics of systems of one and two neurons in the simulated Verilog-A circuit, which are compared to the expected dynamics of the abstract CTRNN model. Due to the presence of parasitic circuit elements in the Verilog-A simulation, it is seen that there is a topological equivalence, but not an exact isomorphism, between the theoretical model and the simulated model. The implications of these discrepancies for the design of neuromorphic photonic circuits are discussed. Our findings pave the way for the practical implementation of large-scale silicon photonic recurrent neural networks., Comment: 17 pages, 9 figures. Submitted to Physical Review Applied

The continuous growth in data volume has sparked interest in silicon-organic-hybrid nanophotonic devices integrated into silicon photonic integrated circuits (PICs). SOH devices offer improved speed and energy efficiency compared to silicon photonics devices. However, a comprehensive and accurate modeling methodology of SOH devices is lacking. While some preliminary modeling approaches for SOH devices exist, their reliance on theoretical and numerical methodologies, along with a lack of compatibility with electronic design automation (EDA), hinders their seamless and rapid integration with silicon PICs. Here, we develop a phenomenological, building-block-based SOH PICs simulation methodology spanning from the physics to the system level, offering high accuracy, comprehensiveness, and EDA-style compatibility. Our model is also readily integrable and scalable, lending itself to the design of large-scale silicon PICs. Our proposed modeling methodology is agnostic and compatible with any photonics-electronics co-simulation software. We validate this methodology by comparing experimentally demonstrated SOH microring modulators and Mach Zehnder modulators with those obtained through simulation, demonstrating its ability to model various modulator topologies. We also show our methodology's ease and speed in modeling large-scale systems. As an illustrative example, we use our methodology to design and study a 3-channel SOH MRM-based wavelength-division (de)multiplexer, a widely used component in various applications, including neuromorphic computing, data center interconnects, communications, and sensing. Our modeling approach is compatible with other materials exhibiting the Pockels and Kerr effects. To our knowledge, this represents the first comprehensive physics-to-system-level EDA-compatible simulation methodology for SOH modulators., Comment: 15 pages, 7 figures

Integrated photonic neural networks (PNNs) are at the forefront of AI computing, leveraging on light's unique properties, such as large bandwidth, low latency, and potentially low power consumption. Nevertheless, the integrated optical components within PNNs are inherently sensitive to external disturbances and thermal interference, which can detrimentally affect computing accuracy and reliability. Current solutions often use complicated control methods, resulting in high hardware complexity impractical for large-scale PNNs. In response, we propose a novel hardware-aware training and pruning approach. The core idea is to train the parameters of a physical neural network towards its noise-robust and energy-efficient region. This innovation enables control-free and energy-efficient photonic computing. Our method is validated across diverse integrated PNN architectures. Through experimental validation, our approach significantly enhances the computing precision of MRR-based PNN, achieving a notable 4-bit improvement without the need for complex device control mechanisms or energy-intensive temperature stabilization circuits. Specifically, it improves the accuracy of experimental handwritten digit classification from 67.0% to 95.0%, nearing theoretical limits and achieved without a thermoelectric controller. Additionally, this approach reduces the energy by tenfold. We further extend the validation to various architectures, such as PCM-based PNN, demonstrating the broad applicability of our approach across different platforms. This advancement represents a significant step towards the practical, energy-efficient, and noise-resilient implementation of large-scale integrated PNNs., Comment: 21 pages, 6 figures

Quantum photonic integrated circuits, composed of linear-optical elements, offer an efficient way for encoding and processing quantum information on-chip. At their core, these circuits rely on reconfigurable phase shifters, typically constructed from classical components such as thermo- or electro-optical materials, while quantum solid-state emitters such as quantum dots are limited to acting as single-photon sources. Here, we demonstrate the potential of quantum dots as reconfigurable phase shifters. We use numerical models based on established literature parameters to show that circuits utilizing these emitters enable high-fidelity operation and are scalable. Despite the inherent imperfections associated with quantum dots, such as imperfect coupling, dephasing, or spectral diffusion, our optimization shows that these do not significantly impact the unitary infidelity. Specifically, they do not increase the infidelity by more than 0.001 in circuits with up to 10 modes, compared to those affected only by standard nanophotonic losses and routing errors. For example, we achieve fidelities of 0.9998 in quantum-dot-based circuits enacting controlled-phase and -not gates without any redundancies. These findings demonstrate the feasibility of quantum emitter-driven quantum information processing and pave the way for cryogenically-compatible, fast, and low-loss reconfigurable quantum photonic circuits., Comment: manuscript includes 10 pages, 4 figures followed by the supplement with 11 pages, 6 figures

Photonics offers a transformative approach to artificial intelligence (AI) and neuromorphic computing by providing low latency, high bandwidth, and energy-efficient computations. Here, we introduce a photonic tensor core processor enabled by time-multiplexed inputs and charge-integrated outputs. This fully integrated processor, comprising only two thin-film lithium niobate (TFLN) modulators, a III-V laser, and a charge-integration photoreceiver, can implement an entire layer of a neural network. It can execute 65 billion operations per second (GOPS) per neuron, including simultaneous weight updates-a hitherto unachieved speed. Our processor stands out from conventional photonic processors, which have static weights set during training, as it supports fast "hardware-in-the-loop" training, and can dynamically adjust the inputs (fan-in) and outputs (fan-out) within a layer, thereby enhancing its versatility. Our processor can perform large-scale dot-product operations with vector dimensions up to 131,072. Furthermore, it successfully classifies (supervised learning) and clusters (unsupervised learning) 112*112-pixel images after "hardware-in-the-loop" training. To handle "hardware-in-the-loop" training for clustering AI tasks, we provide a solution for multiplications involving two negative numbers based on our processor., Comment: 19 pages, 6 figures

Radio-frequency interference is a growing concern as wireless technology advances, with potentially life-threatening consequences like interference between radar altimeters and 5G cellular networks. Mobile transceivers mix signals with varying ratios over time, posing challenges for conventional digital signal processing (DSP) due to its high latency. These challenges will worsen as future wireless technologies adopt higher carrier frequencies and data rates. However, conventional DSPs, already on the brink of their clock frequency limit, are expected to offer only marginal speed advancements. This paper introduces a photonic processor to address dynamic interference through blind source separation (BSS). Our system-on-chip processor employs a fully integrated photonic signal pathway in the analogue domain, enabling rapid demixing of received mixtures and recovering the signal-of-interest in under 15 picoseconds. This reduction in latency surpasses electronic counterparts by more than three orders of magnitude. To complement the photonic processor, electronic peripherals based on field-programmable gate array (FPGA) assess the effectiveness of demixing and continuously update demixing weights at a rate of up to 305 Hz. This compact setup features precise dithering weight control, impedance-controlled circuit board and optical fibre packaging, suitable for handheld and mobile scenarios. We experimentally demonstrate the processor's ability to suppress transmission errors and maintain signal-to-noise ratios in two scenarios, radar altimeters and mobile communications. This work pioneers the real-time adaptability of integrated silicon photonics, enabling online learning and weight adjustments, and showcasing practical operational applications for photonic processing.

Silicon photonics has developed into a mainstream technology driven by advances in optical communications. The current generation has led to a proliferation of integrated photonic devices from thousands to millions - mainly in the form of communication transceivers for data centers. Products in many exciting applications, such as sensing and computing, are around the corner. What will it take to increase the proliferation of silicon photonics from millions to billions of units shipped? What will the next generation of silicon photonics look like? What are the common threads in the integration and fabrication bottlenecks that silicon photonic applications face, and which emerging technologies can solve them? This perspective article is an attempt to answer such questions. We chart the generational trends in silicon photonics technology, drawing parallels from the generational definitions of CMOS technology. We identify the crucial challenges that must be solved to make giant strides in CMOS-foundry-compatible devices, circuits, integration, and packaging. We identify challenges critical to the next generation of systems and applications - in communication, signal processing, and sensing. By identifying and summarizing such challenges and opportunities, we aim to stimulate further research on devices, circuits, and systems for the silicon photonics ecosystem.

Multiple-input multiple-output (MIMO) mmWave devices broadcast multiple spatially-separated data streams simultaneously in order to increase data transfer rates. Data transfer can, however, be compromised by interference. Conventional techniques for mitigating interference require additional space and power not generally available in handheld mobile devices. Here, we propose a photonic mmWave MIMO receiver architecture capable of interference cancellation with greatly reduced space and power needs. We demonstrate real-time photonic interference cancellation with an integrated FPGA-photonic system that executes a novel zero-calibration micro-ring resonator control algorithm. The system achieves sub-second cancellation weight determination latency with sub-Nyquist sampling. We evaluate the impact of canceller design parameters on performance, establishing that effective photonic cancellation is possible in handheld devices with less than 30 ms weight determination latency.

Spiking neurons and neural networks constitute a fundamental building block for brain-inspired computing, which is posed to benefit significantly from photonic hardware implementations. In this work, we experimentally investigate an interconnected system based on an ultrafast spiking VCSEL-neuron and a silicon photonics (SiPh) integrated micro-ring resonator (MRR) weight bank, and demonstrate two different functional arrangements of these devices. First, we show that MRR weightbanks can be used in conjuction with the spiking VCSEL-neurons to perform amplitude weighting of sub-ns optical spiking signals. Second, we show that a continuous firing VCSEL-neuron can be directly modulated using a locking signal propagated through a single weighting micro-ring, and we utilize this functionality to perform optical spike firing rate-coding via thermal tuning of the micro-ring resonator. Given the significant track record of both integrated weight banks and photonic VCSEL-neurons, we believe these results demonstrate the viability of combining these two classes of devices for use in functional neuromorphic photonic systems., Comment: 9 pages, 6 figures

The explosion of artificial intelligence and machine-learning algorithms, connected to the exponential growth of the exchanged data, is driving a search for novel application-specific hardware accelerators. Among the many, the photonics field appears to be in the perfect spotlight for this global data explosion, thanks to its almost infinite bandwidth capacity associated with limited energy consumption. In this review, we will overview the major advantages that photonics has over electronics for hardware accelerators, followed by a comparison between the major architectures implemented on Photonics Integrated Circuits (PIC) for both the linear and nonlinear parts of Neural Networks. By the end, we will highlight the main driving forces for the next generation of photonic accelerators, as well as the main limits that must be overcome.

DSP (digital signal processing) has been widely applied in optical communication systems to mitigate signal distortions and has become one of the key technologies that have sustained data traffic growth over the past decade. However, the strict energy budget of application-specific integrated circuit-based DSP chips has prevented the deployment of some powerful but computationally costly DSP algorithms. As a result, fiber nonlinearity-induced signal distortions impede fiber communications systems, especially in wavelength-division multiplexed (WDM) transmission systems. To solve these challenges, photonics hardware (i.e., photonic neural networks) promises to break performance limitations in electronics and gain advantages in bandwidth, latency, and power consumption in solving intellectual tasks that are unreachable by conventional digital electronic platforms. This work proposes a photonic recurrent neural network (RNN) capable of simultaneously resolving dispersion and both intra and inter-channel fiber nonlinearities in multiple WDM channels in the photonic domain, for the first time to our best knowledge. Furthermore, our photonic RNN can directly process optical WDM signals in the photonic domain, avoiding prohibitive energy consumption and speed overhead in analog to digital converters (ADC). We demonstrate in simulation that our photonic RNN can process multiple WDM channels simultaneously and achieve a reduced bit error rate compared to typical DSP algorithms for all WDM channels in a pulse-amplitude modulation 4-level (PAM4) transmission system, thanks to its unique capability to address inter-channel fiber nonlinearities. In addition to signal quality performance, the proposed system also promises to significantly reduce the power consumption and the latency compared to the state-of-the-art DSP chips, according to our power and latency analysis.

Quantum photonic neural networks are variational photonic circuits that can be trained to implement high-fidelity quantum operations. However, work-to-date has assumed idealized components, including a perfect $\pi$ Kerr nonlinearity. Here, we investigate the limitations of realistic quantum photonic neural networks that suffer from fabrication imperfections leading to photon loss and imperfect routing, and weak nonlinearities, showing that they can learn to overcome most of these errors. Using the example of a Bell-state analyzer, we demonstrate that there is an optimal network size, which balances imperfections versus the ability to compensate for lacking nonlinearities. With a sub-optimal $\pi/10$ effective Kerr nonlinearity, we show that a network fabricated with current state-of-the-art processes can achieve an unconditional fidelity of 0.891, that increases to 0.999999 if it is possible to precondition success on the detection of a photon in each logical photonic qubit. Our results provide a guide to the construction of viable, brain-inspired quantum photonic devices for emerging quantum technologies., Comment: 20 pages, 12 figures

The expansion of telecommunications incurs increasingly severe crosstalk and interference, and a physical layer cognitive method, called blind source separation (BSS), can effectively address these issues. BSS requires minimal prior knowledge to recover signals from their mixtures, agnostic to carrier frequency, signal format, and channel conditions. However, previous electronic implementations of BSS did not fulfill this versatility requirement due to the inherently narrow bandwidth of radio-frequency (RF) components, the high energy consumption of digital signal processors (DSP), and their shared weaknesses of low scalability. Here, we report a photonic BSS approach that inherits the advantages of optical devices and can fully fulfill its "blindness" aspect. Using a microring weight bank integrated on a photonic chip, we demonstrate energy-efficient, WDM-scalable BSS across 19.2 GHz of bandwidth, covering many standard frequency bands. Our system also has a high (9-bit) resolution for signal demixing thanks to a recently developed dithering control method, resulting in higher signal-to-interference ratios (SIR) even for ill-conditioned mixtures.

Neuromorphic photonic processors based on resonator weight banks are an emerging candidate technology for enabling modern artificial intelligence (AI) in high speed, analog systems. These purpose-built analog devices implement vector multiplications with the physics of resonator devices, offering efficiency, latency, and throughput advantages over equivalent electronic circuits. Along with these advantages, however, often comes the difficult challenges of compensation for fabrication variations and environmental disturbances. In this paper we review sources of variation and disturbances from our experiments, as well as mathematically define quantities that model them. Then, we introduce how the physics of resonators can be exploited to weight and sum multiwavelength signals. Finally, we outline automated design and control methodologies necessary to create practical, manufacturable, and high accuracy/precision resonator weight banks that can withstand operating conditions in the field. This represents a road map for unlocking the potential of resonator weight banks in practical deployment scenarios., Comment: 14 pages, 9 figures

There has been growing interest in using photonic processors for performing neural network inference operations; however, these networks are currently trained using standard digital electronics. Here, we propose on-chip training of neural networks enabled by a CMOS-compatible silicon photonic architecture to harness the potential for massively parallel, efficient, and fast data operations. Our scheme employs the direct feedback alignment training algorithm, which trains neural networks using error feedback rather than error backpropagation, and can operate at speeds of trillions of multiply-accumulate (MAC) operations per second while consuming less than one picojoule per MAC operation. The photonic architecture exploits parallelized matrix-vector multiplications using arrays of microring resonators for processing multi-channel analog signals along single waveguide buses to calculate the gradient vector for each neural network layer in situ. We also experimentally demonstrate training deep neural networks with the MNIST dataset using on-chip MAC operation results. Our novel approach for efficient, ultra-fast neural network training showcases photonics as a promising platform for executing AI applications., Comment: 15 pages, 6 figures

In optical communication systems, fibre nonlinearity is the major obstacle in increasing the transmission capacity. Typically, digital signal processing techniques and hardware are used to deal with optical communication signals, but increasing speed and computational complexity create challenges for such approaches. Highly parallel, ultrafast neural networks using photonic devices have the potential to ease the requirements placed on the digital signal processing circuits by processing the optical signals in the analogue domain. Here we report a silicon photonice-lectronic neural network for solving fibre nonlinearity compensation of submarine optical fibre transmission systems. Our approach uses a photonic neural network based on wavelength-division multiplexing built on a CMOS-compatible silicon photonic platform. We show that the platform can be used to compensate optical fibre nonlinearities and improve the signal quality (Q)-factor in a 10,080 km submarine fibre communication system. The Q-factor improvement is comparable to that of a software-based neural network implemented on a 32-bit graphic processing unit-assisted workstation. Our reconfigurable photonic-electronic integrated neural network promises to address pressing challenges in high-speed intelligent signal processing.

Neural networks have enabled applications in artificial intelligence through machine learning, and neuromorphic computing. Software implementations of neural networks on conventional computers that have separate memory and processor (and that operate sequentially) are limited in speed and energy efficiency. Neuromorphic engineering aims to build processors in which hardware mimics neurons and synapses in the brain for distributed and parallel processing. Neuromorphic engineering enabled by photonics (optical physics) can offer sub-nanosecond latencies and high bandwidth with low energies to extend the domain of artificial intelligence and neuromorphic computing applications to machine learning acceleration, nonlinear programming, intelligent signal processing, etc. Photonic neural networks have been demonstrated on integrated platforms and free-space optics depending on the class of applications being targeted. Here, we discuss the prospects and demonstrated applications of these photonic neural networks.

Deep neural networks (DNN) consist of layers of neurons interconnected by synaptic weights. A high bit-precision in weights is generally required to guarantee high accuracy in many applications. Minimizing error accumulation between layers is also essential when building large-scale networks. Recent demonstrations of photonic neural networks are limited in bit-precision due to crosstalk and the high sensitivity of optical components (e.g., resonators). Here, we experimentally demonstrate a record-high precision of 9 bits with a dithering control scheme for photonic synapses. We then numerically simulated the impact with increased synaptic precision on a wireless signal classification application. This work could help realize the potential of photonic neural networks for many practical, real-world tasks., Comment: 7 pages

There has been a recent surge of interest in the implementation of linear operations such as matrix multipications using photonic integrated circuit technology. However, these approaches require an efficient and flexible way to perform nonlinear operations in the photonic domain. We have fabricated an optoelectronic nonlinear device--a laser neuron--that uses excitable laser dynamics to achieve biologically-inspired spiking behavior. We demonstrate functionality with simultaneous excitation, inhibition, and summation across multiple wavelengths. We also demonstrate cascadability and compatibility with a wavelength multiplexing protocol, both essential for larger scale system integration. Laser neurons represent an important class of optoelectronic nonlinear processors that can complement both the enormous bandwidth density and energy efficiency of photonic computing operations., Comment: 11 pages, 7 figures. Previously submitted to Nature Photonics. Currently received reviewer feedback

Research in photonic computing has flourished due to the proliferation of optoelectronic components on photonic integration platforms. Photonic integrated circuits have enabled ultrafast artificial neural networks, providing a framework for a new class of information processing machines. Algorithms running on such hardware have the potential to address the growing demand for machine learning and artificial intelligence, in areas such as medical diagnosis, telecommunications, and high-performance and scientific computing. In parallel, the development of neuromorphic electronics has highlighted challenges in that domain, in particular, related to processor latency. Neuromorphic photonics offers sub-nanosecond latencies, providing a complementary opportunity to extend the domain of artificial intelligence. Here, we review recent advances in integrated photonic neuromorphic systems, discuss current and future challenges, and outline the advances in science and technology needed to meet those challenges., Comment: 21 pages, 6 figures

We experimentally demonstrate an all-optical programmable thresholder on a silicon photonic circuit. By exploiting the nonlinearities in a resonator-enhanced Mach-Zehnder interferometer (MZI), the proposed optical thresholder can discriminate two optical signals with very similar amplitudes. We experimentally achieve a signal contrast enhancement of 40, which leads to a bit error rate (BER) improvement by 5 orders of magnitude and a receiver sensitivity improvement of 11 dB. We present the thresholding function of our device and validate the function with experimental data. Furthermore, we investigate potential device speed improvement by reducing the carrier lifetime., Comment: 4 pages, 5 figures, letter

Neuromorphic photonics relies on efficiently emulating analog neural networks at high speeds. Prior work showed that transducing signals from the optical to the electrical domain and back with transimpedance gain was an efficient approach to implementing analog photonic neurons and scalable networks. Here, we examine modulator-based photonic neuron circuits with passive and active transimpedance gains, with special attention to the sources of noise propagation. We find that a modulator nonlinear transfer function can suppress noise, which is necessary to avoid noise propagation in hardware neural networks. In addition, while efficient modulators can reduce power for an individual neuron, signal-to-noise ratios must be traded off with power consumption at a system level. Active transimpedance amplifiers may help relax this tradeoff for conventional p-n junction silicon photonic modulators, but a passive transimpedance circuit is sufficient when very efficient modulators (i.e. low C and low V-pi) are employed., Comment: 8 pages, 7 figures, 1 table

We describe a new technique which minimizes the amount of neurons in the hidden layer of a random recurrent neural network (rRNN) for time series prediction. Merging Takens-based attractor reconstruction methods with machine learning, we identify a mechanism for feature extraction that can be leveraged to lower the network size. We obtain criteria specific to the particular prediction task and derive the scaling law of the prediction error. The consequences of our theory are demonstrated by designing a Takens-inspired hybrid processor, which extends a rRNN with a priori designed delay external memory. Our hybrid architecture is therefore designed including both, real and virtual nodes. Via this symbiosis, we show performance of the hybrid processor by stabilizing an arrhythmic neural model. Thanks to our obtained design rules, we can reduce the stabilizing neural network's size by a factor of 15 with respect to a standard system., Comment: 12 pages, 8 figures

Recently integrated optics has become an intriguing platform for implementing machine learning algorithms and inparticular neural networks. Integrated photonic circuits can straightforwardly perform vector-matrix multiplicationswith high efficiency and low power consumption by using weighting mechanism through linear optics. Although,this can not be said for the activation function which requires either nonlinear optics or an electro-optic module withan appropriate dynamic range. Even though all-optical nonlinear optics is potentially faster, its current integrationis challenging and is rather inefficient. Here we demonstrate an electro-absorption modulator based on an IndiumTin Oxide layer, whose dynamic range is used as nonlinear activation function of a photonic neuron. The nonlinearactivation mechanism is based on a photodiode, which integrates the weighed products, and whose photovoltage drivesthe elecro-absorption modulator. The synapse and neuron circuit is then constructed to execute a 200-node MNISTclassification neural network used for benchmarking the nonlinear activation function and compared with an equivalentelectronic module., Comment: 9pages, 5 figures

Convolutional Neural Networks (CNNs) are powerful and highly ubiquitous tools for extracting features from large datasets for applications such as computer vision and natural language processing. However, a convolution is a computationally expensive operation in digital electronics. In contrast, neuromorphic photonic systems, which have experienced a recent surge of interest over the last few years, propose higher bandwidth and energy efficiencies for neural network training and inference. Neuromorphic photonics exploits the advantages of optical electronics, including the ease of analog processing, and busing multiple signals on a single waveguide at the speed of light. Here, we propose a Digital Electronic and Analog Photonic (DEAP) CNN hardware architecture that has potential to be 2.8 to 14 times faster while maintaining the same power usage of current state-of-the-art GPUs., Comment: 12 pages, 9 figures, 3 tables

Multi-antenna radio front-ends generate a multi-dimensional flood of information, most of which is partially redundant. Redundancy is eliminated by dimensionality reduction, but contemporary digital processing techniques face harsh fundamental tradeoffs when implementing this class of functions. These tradeoffs can be broken in the analog domain, in which the performance of optical technologies greatly exceeds that of electronic counterparts. Here, we present concepts, methods, and a first demonstration of multivariate photonics: a combination of integrated photonic hardware, analog dimensionality reduction, and blind algorithmic techniques. We experimentally demonstrate 2-channel, 1.0 GHz principal component analysis in a photonic weight bank using recently proposed algorithms for synthesizing the multivariate properties of signals to which the receiver is blind. Novel methods are introduced for controlling blindness conditions in a laboratory context. This work provides a foundation for further research in multivariate photonic information processing, which is poised to play a role in future generations of wireless technology., Comment: 24 pages, 7 figures

There has been a recently renewed interest in neuromorphic photonics, a field promising to access pivotal and unexplored regimes of machine intelligence. Progress has been made on isolated neurons and analog interconnects; nevertheless, this renewal has yet to produce a demonstration of a silicon photonic neuron capable of interacting with other like neurons. We report a modulator-class photonic neuron fabricated in a conventional silicon photonic process line. We demonstrate behaviors of transfer function configurability, fan-in, inhibition, time-resolved processing, and, crucially, autaptic cascadability -- a sufficient set of behaviors for a device to act as a neuron participating in a network of like neurons. The silicon photonic modulator neuron constitutes the final piece needed to make photonic neural networks fully integrated on currently available silicon photonic platforms., Comment: 16 pages, 10 figures

Photonic neural networks benefit from both the high channel capacity- and the wave nature of light acting as an effective weighting mechanism through linear optics. The neuron's activation function, however, requires nonlinearity which can be achieved either through nonlinear optics or electro-optics. Nonlinear optics, while potentially faster, is challenging at low optical power. With electro-optics, a photodiode integrating the weighted products of a photonic perceptron can be paired directly to a modulator, which creates a nonlinear transfer function for efficient operating. Here we model the activation functions of five types of electro-absorption modulators, analyze their individual performance over varying performance parameters, and simulate their combined effect on the inference of the neural network

In an age overrun with information, the ability to process reams of data has become crucial. The demand for data will continue to grow as smart gadgets multiply and become increasingly integrated into our daily lives. Next-generation industries in artificial intelligence services and high-performance computing are so far supported by microelectronic platforms. These data-intensive enterprises rely on continual improvements in hardware. Their prospects are running up against a stark reality: conventional one-size-fits-all solutions offered by digital electronics can no longer satisfy this need, as Moore's law (exponential hardware scaling), interconnection density, and the von Neumann architecture reach their limits. With its superior speed and reconfigurability, analog photonics can provide some relief to these problems; however, complex applications of analog photonics have remained largely unexplored due to the absence of a robust photonic integration industry. Recently, the landscape for commercially-manufacturable photonic chips has been changing rapidly and now promises to achieve economies of scale previously enjoyed solely by microelectronics. The scientific community has set out to build bridges between the domains of photonic device physics and neural networks, giving rise to the field of \emph{neuromorphic photonics}. This article reviews the recent progress in integrated neuromorphic photonics. We provide an overview of neuromorphic computing, discuss the associated technology (microelectronic and photonic) platforms and compare their metric performance. We discuss photonic neural network approaches and challenges for integrated neuromorphic photonic processors while providing an in-depth description of photonic neurons and a candidate interconnection architecture. We conclude with a future outlook of neuro-inspired photonic processing., Comment: 28 pages, 19 figures

Photonic systems for high-performance information processing have attracted renewed interest. Neuromorphic silicon photonics has the potential to integrate processing functions that vastly exceed the capabilities of electronics. We report first observations of a recurrent silicon photonic neural network, in which connections are configured by microring weight banks. A mathematical isomorphism between the silicon photonic circuit and a continuous neural network model is demonstrated through dynamical bifurcation analysis. Exploiting this isomorphism, a simulated 24-node silicon photonic neural network is programmed using "neural compiler" to solve a differential system emulation task. A 294-fold acceleration against a conventional benchmark is predicted. We also propose and derive power consumption analysis for modulator-class neurons that, as opposed to laser-class neurons, are compatible with silicon photonic platforms. At increased scale, Neuromorphic silicon photonics could access new regimes of ultrafast information processing for radio, control, and scientific computing., Comment: 12 pages, 4 figures, accepted in Scientific Reports

Novel materials and devices in photonics have the potential to revolutionize optical information processing, beyond conventional binary-logic approaches. Laser systems offer a rich repertoire of useful dynamical behaviors, including the excitable dynamics also found in the time-resolved "spiking" of neurons. Spiking reconciles the expressiveness and efficiency of analog processing with the robustness and scalability of digital processing. We demonstrate that graphene-coupled laser systems offer a unified low-level spike optical processing paradigm that goes well beyond previously studied laser dynamics. We show that this platform can simultaneously exhibit logic-level restoration, cascadability and input-output isolation---fundamental challenges in optical information processing. We also implement low-level spike-processing tasks that are critical for higher level processing: temporal pattern detection and stable recurrent memory. We study these properties in the context of a fiber laser system, but the addition of graphene leads to a number of advantages which stem from its unique properties, including high absorption and fast carrier relaxation. These could lead to significant speed and efficiency improvements in unconventional laser processing devices, and ongoing research on graphene microfabrication promises compatibility with integrated laser platforms., Comment: 13 pages, 7 figures