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The application of hardware controllers within safety critical environments is becoming ever more common and complex. With increasing complexity comes a higher potential for design errors. Hardware design tools such as Electronic Design Automation (EDA) tools, aim to expose these errors using equivalence checking between abstract and concrete designs and apply functional property verification, driven by scenarios. Determining these scenarios using test environments, is however, not always straightforward. The EDA tools aid in determining the simulation coverage of test scenarios, but finding corner cases during testing to ensure complete coverage is difficult. Current research in hardware verification aims to find methods that can discover these extremes and identify errors that reside within the design; one of these approaches employs formal methods. In this research, we determine that an existing Communicating Sequential Processes (CSP) compiler, the Shared Variable Analyser (SVA), is suitable as a basis for our work. SVA is designed for analysing threaded processes that interact with shared global variables. The systems analysed by this custom compiler reflect many of the behavioural concepts within the hardware design language, Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL). A contribution of the thesis is the definition of formal approach for modelling hardware designs based on the concepts of shared signals. This approach is implemented by extending the SVA compiler; we call this augmentation of the compiler the Shared Variable Analyser for VHDL (SVA4VHDL). Another contribution of the thesis is the automatic generation from VHDL scripts to SVA4VHDL scripts, which are then provided as input to the compiler. This automatic generation ensures that scripts can be generated easily and repeatably without errors. SVA4VHDL introduces: new syntax to the compiler to model VHDL processes; replaces the SVA variable definition with a new CSP process that correctly describes the different types of VHDL signals; defines a CSP process that describes the VHDL stabilisation model for signals; and captures the design of each system as it is written, not only modelling the behaviour within a hardware design, but also the hierarchical structure used when composing the hardware description. The hierarchical compilation strategy used in our approach leads to an optimised CSP process composition, and therefore is able to accommodate hardware designs comprising multiple instantiated VHDL components. We exploit full state space exploration of hardware models compiled by SVA4VHDL that may yield counterexamples demonstrating that the system requirements have not been met. These counterexamples can form the basis of test scenarios which can then feedback into the EDA tools. The compiler proposed in the thesis is applied to two case studies, a Traffic Lights System and a Built-In Self Test. The case studies provide confirmation that SVA4VHDL is capable of producing optimised CSP models for complex VHDL hardware descriptions and support a discussion on the scalability issues and limitations of the formal approach. The Traffic Lights System was also used to perform a comparison with an existing CSP approach proposed by Evans, to model VHDL descriptions. This evaluation demonstrated that Evans' approach was not suitable to model real world hardware systems and a clearer more optimal modelling strategy was required. Furthermore, the case studies identify different styles of specification that can be applied to SVA4VHDL models, from traditional safety and liveness specifications to the use of fault injection processes. Fault injection requires the exchanging of definitions of a model’s components so that faults can be detected. If all specifications are met, the hardware designs meet their original requirements, providing the high confidence levels required for safety critical systems.

The purpose of the research was to investigate the difference in attributions of offenders and magistrates about the factors that led to offending behaviour. Difference in beliefs between offenders and magistrates, about seriousness of some common offences and factors believed to be motives for offending, justification of offending and neutralisation of responsibility for offending were also investigated. The effect that differences in attributions between offenders and magistrates and how these influence the way in which offenders are dealt with in the criminal justice system was investigated. The attitude of criminal justice system professionals, and magistrates towards offenders was also investigated to find out if they affect court sentencing decisions, and the treatment and punishment imposed in an attempt to reduce offending. My research has shown, that offenders and magistrates hold significantly different attributions about the factors that influence people to offend, and about offence seriousness. Offenders and magistrates also hold significantly different beliefs about motives for offending, justification of offending and neutralisation of responsibility for offending. The UK Government Crime Reduction Policy since 1997, has been strongly related to the ‘What Works’ approach. This has influenced sentencing policy and the treatment of offenders. A major strand of the policy has been the introduction and implementation of the What Works’ approach and the use of Cognitive Behavioural Accredited Programmes within the Probation Service and Prison Service to change the behaviour of offenders and reduce recividism (Harper and Chitty 2005). Based on my research findings recommendations are made in the final chapter of the thesis for modifications to the present approach, and the treatment of offenders.

The demand for faster, smaller and cheaper electronic devices such as mobile phones and mp3 players, together with Moore's law, are the driving forces behind the miniaturisation of transistors in silicon-based processors and memory. As the aggressive downscaling of the transistors continues, stringent requirements are placed on the most difficult parts of the transistor to fabricate: the source/drain extension regions, which are required to be ultra-shallow and highly-active. Today, the most common technique to produce these regions is to pre-amorphise the surface region with a relatively high mass ion, typically germanium, and then implant low energy boron into the amorphous region. During subsequent annealing, solid phase epitaxial re-growth transforms this region back to its original crystalline structure, with the boron incorporated substitutionally. However, excess silicon interstitials remaining just beyond the original amorphous/crystalline interface position condense into clusters which evolve into extended defects known as End of Range (EOR) defects. During annealing, silicon interstitials are released from the EOR defects and their coupling with boron leads to Transient Enhanced Diffusion (TED) and Boron-Interstitial Cluster (BIC) formation. These processes, in turn, lead to increased junction depth and reduced dopant electrical activation respectively. In addition, any defects that remain in the sample provide current leakage paths through the junction that degrades transistor performance. Therefore novel techniques in transistor fabrication are needed to overcome these problems. Laser annealing is one such technique where the very high temperature for a very short time gives an advantage over conventional rapid thermal annealing in terms of a shallower junction depth and higher boron electrical activation. This thesis investigates the use of a scanning non-melt laser to anneal boron implanted into germanium pre-amorphised silicon to form ultra-shallow junctions for future transistors. It is demonstrated that ultra-shallow junctions (~16nm) are formed that are highly active (~6x10 20 cm-3). The deactivation and diffusion during post-laser rapid thermal annealing due to excess silicon interstitials being released from EOR defects can be minimised by optimising the laser annealing conditions resulting in a thermally stable ultra-shallow junction. Furthermore by optimising the germanium pre-amorphising implant, EOR defects can be eliminated by the laser annealing.

The purpose of this study was to examine the difference in student success by retained students who participate in the Hamblen County (Tennessee) Credit Recovery Program [HCCRP] in the year prior and following their participation. HCCRP is an alternative intervention for students who have been retained in the middle grades of Hamblen County School System. Student success was defined and assessed in the areas of academic proficiency, discipline, and student absenteeism. Student information regarding each area was obtained from the Hamblen County School System, coded, and analyzed through quantitative testing. This study was guided by 8 research questions and 8 corresponding null hypotheses. Five of the null hypotheses were tested for significance using a paired sample t tests, 2 were tested using a chi square testing, and 1 was tested using a single sample t test. The population of this study was 94 students who had participated in the HCCRP in the 2010-2012 school years. The analysis of data showed no significant difference in student science scores, number of discipline referrals, or absenteeism in comparing the year prior and the year following the students' participation in HCCRP. The paired sample t test did reveal significant increases in both student math and reading/language arts scores. A chi squared test showed a significant number of low socioeconomic students within the population. Additionally, a single sample t test showed a significantly higher number of days students missed prior to attending HCCRP and the acceptable level of absenteeism. The result of this study indicates that students who have attended HCCRP as an alternative to grade level retention benefited academically in math and reading/language arts. [The dissertation citations contained here are published with the permission of ProQuest LLC. Further reproduction is prohibited without permission. Copies of dissertations may be obtained by Telephone (800) 1-800-521-0600. Web page: http://www.proquest.com/en-US/products/dissertations/individuals.shtml.]