15 results on '"Shang Zeyi"'
Search Results
2. FPGA Implementation of Reaction Systems.
- Author
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Shang, Zeyi, Verlan, Sergey, Lu, Jing, Wei, Zhe, and Zhou, Min
- Subjects
BIOLOGICALLY inspired computing ,CYTOPLASMIC filaments ,PARALLEL electric circuits ,BIOCHEMICAL models ,DIGITAL electronics - Abstract
Reaction system (RS) belongs to a type of qualitative computing model inspired by biochemical reactions taking place inside biological cells. It concerns more the interactions and causality among reactions rather than concrete concentrations of chemical entities. Many biochemical processes and models can be represented in the form of reaction systems so that complex relations and ultimate products of a variety of reactions can be revealed qualitatively. The reaction system works in parallel mode. Software simulation of this kind of model may suffer from the penalty of inefficient parallelism for the limited performance of CPU/GPU, especially for the simulation of large-scale models. Considering potential applications of reaction systems in disease diagnoses and in drug developments, hardware implementation of reaction systems provides a better way to accelerate computations involved. In this paper, an FPGA implementation method of a reaction system called RSFIM is proposed. Two small-scale models, i.e., the reaction system of intermediate filaments self-assembly and heat shock response, are implemented on FPGA, achieving a computing speed of 2 × 10 8 steps per second. For large-scale models, the ErbB reaction system is implemented, obtaining a speedup of 7.649 × 10 4 compared with its highest performance GPU simulation so far. The reaction system binary counter, which is a quantitative model, is also implemented by the Boolean explanation of the qualitative character of the reaction system. FPGA implementation of reaction systems opens a novel research line to speed up the simulations of reaction systems and other biological models in the perspective of parallel digital circuits. [ABSTRACT FROM AUTHOR]
- Published
- 2024
- Full Text
- View/download PDF
3. Vulnerability assessment of hydrogen stations based on cloud center of gravity theory
- Author
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Zhang, Jixin, primary, Lang, Xiaosong, additional, Jing, Yilin, additional, Kang, Jian, additional, You, Qiuju, additional, Shang, Zeyi, additional, Shi, Minghao, additional, and Dai, Haoyuan, additional
- Published
- 2023
- Full Text
- View/download PDF
4. Emergency management capability evaluation of chemical parks based on PFDEMATEL‐G1 and PFTOPSIS.
- Author
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Zhang, Jixin, Lang, Xiaosong, You, Qiuju, Jing, Yilin, Shang, Zeyi, Shi, Minghao, and Kang, Jian
- Abstract
Conducting an evaluation of the emergency management capacity of the chemical park and implementing targeted improvements based on the assessment results can significantly enhance the emergency preparedness and response capabilities of both the management departments and enterprises. This article proposes an emergency management capability assessment model for chemical parks based on PFDEMATEL (the Pythagorean fuzzy decision‐making trial and evaluation laboratory)‐G1 (the ordinal relation method) and PFTOPSIS (the Pythagorean fuzzy set TOPSIS). Firstly, based on the four stages of emergency management of chemical parks, emergency prevention, emergency preparedness, emergency response, and emergency recovery, an index system for evaluating the emergency management capacity of chemical parks was established. Secondly, PFDEMATEL is used to modify the G1 method to determine the index weight, so as to realize the objective rationality of the G1 method empowerment. On this basis, an emergency management capability evaluation model of chemical park to improve PFTOPSIS is proposed. Finally, taking three chemical parks as examples, the applicability of the evaluation model is verified. The research results can provide a theoretical reference for the emergency management decision‐making of governments and enterprises, improve the status quo of emergency management, and improve the prevention and handling capabilities of emergencies. [ABSTRACT FROM AUTHOR]
- Published
- 2023
- Full Text
- View/download PDF
5. An FPGA Architecture for the RRT Algorithm Based on Membrane Computing.
- Author
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Shang, Zeyi, Wei, Zhe, Verlan, Sergey, Li, Jianming, and He, Zhige
- Subjects
PARALLEL algorithms ,ALGORITHMS ,FIELD programmable gate arrays ,PARALLEL programming - Abstract
This paper investigates an FPGA architecture whose primary function is to accelerate parallel computations involved in the rapid-exploring random tree (RRT) algorithm. The RRT algorithm is inherently serial, while in each computing step there are many computations that can be executed simultaneously. Nevertheless, how to carry out these parallel computations on an FPGA so that a high degree of acceleration can be realized is the key issue. Membrane computing is a parallel computing paradigm inspired from the structures and functions of eukaryotic cells. As a newly proposed membrane computing model, the generalized numerical P system (GNPS) is intrinsically parallel; so, it is a good candidate for modeling parallel computations in the RRT algorithm. Open problems for the FPGA implementation of the RRT algorithm and GNPS include: (1) whether it possible to model the RRT with GNPS; (2) if yes, how to design such an FPGA architecture to achieve a better speedup; and (3) instead of implementing GNPSs with a fixed-point-number format, how to devise a GNPS FPGA architecture working with a floating-point-number format. In this paper, we modeled the RRT with a GNPS at first, showing that it is feasible to model the RRT with a GNPS. An FPGA architecture was fabricated according to the GNPS-modeled RRT. In this architecture, computations, which can be executed in parallel, are accommodated in different inner membranes of the GNPS. These membranes are designed as Verilog modules in the register transfer level model. All the computations within a membrane are triggered by the same clock impulse to implement parallel computing. The proposed architecture is validated by implementing it on the Xilinx VC707 FPGA evaluation board. Compared with the software simulation of the GNPS-modeled RRT, the FPGA architecture achieves a speedup of a 10 4 order of magnitude. Although this speedup is obtained on a small map, it reveals that this architecture promises to accelerate the RRT algorithm to a higher level compared with the previously reported architectures. [ABSTRACT FROM AUTHOR]
- Published
- 2023
- Full Text
- View/download PDF
6. An Overview of Hardware Implementation of Membrane Computing Models
- Author
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Yuan Chengxun, Gexiang Zhang, Miguel A. Martínez-del-Amor, Mario J. Pérez-Jiménez, Sergey Verlan, Luis Valencia-Cabrera, Shang Zeyi, Southwest Jiaotong University (SWJTU), Laboratoire d'Algorithmique Complexité et Logique (LACL), Université Paris-Est Créteil Val-de-Marne - Paris 12 (UPEC UP12), Universidad de Sevilla, Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, and Ministerio de Economia, Industria y Competitividad (MINECO). España
- Subjects
Hardware implementations ,General Computer Science ,Computer science ,Field Programmable Gate Array (FPGA) ,0102 computer and information sciences ,02 engineering and technology ,Graphic Processing Unit (GPU) ,01 natural sciences ,Hardware Implementation ,Theoretical Computer Science ,CUDA ,[INFO.INFO-FL]Computer Science [cs]/Formal Languages and Automata Theory [cs.FL] ,0202 electrical engineering, electronic engineering, information engineering ,Architecture ,Field-programmable gate array ,Membrane computing ,Implementation ,business.industry ,Compute Unified Device Architecture (CUDA) ,P Systems ,010201 computation theory & mathematics ,Massively parallel algorithms ,Parallelism (grammar) ,020201 artificial intelligence & image processing ,business ,Computer hardware - Abstract
The model of membrane computing, also known under the name of P systems, is a bio-inspired large-scale parallel computing paradigm having a good potential for the design of massively parallel algorithms. For its implementation it is very natural to choose hardware platforms that have important inherent parallelism, such as field-programmable gate arrays (FPGAs) or compute unified device architecture (CUDA)-enabled graphic processing units (GPUs). This article performs an overview of all existing approaches of hardware implementation in the area of P systems. The quantitative and qualitative attributes of FPGA-based implementations and CUDA-enabled GPU-based simulations are compared to evaluate the two methodologies. Ministerio de Economía, Industria y Competitividad TIN2017-89842-P (MABICAP)
- Published
- 2020
- Full Text
- View/download PDF
7. An Overview of Hardware Implementation of Membrane Computing Models
- Author
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Zhang, Gexiang, primary, Shang, Zeyi, additional, Verlan, Sergey, additional, Martínez-del-Amor, Miguel Á., additional, Yuan, Chengxun, additional, Valencia-Cabrera, Luis, additional, and Pérez-Jiménez, Mario J., additional
- Published
- 2020
- Full Text
- View/download PDF
8. An Overview of Hardware Implementations of P Systems
- Author
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Shang, Zeyi, Verlan, Sergey, Zhang, Gexiang, Martínez del Amor, Miguel Ángel, Valencia Cabrera, Luis, Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Universidad de Sevilla. TIC193: Computación Natural, and Universidad de Sevilla. TIC193 : Computación Natural
- Subjects
Field Programmable Gate Array (FPGA) ,P systems ,CUDA ,Membrane Computing ,Hardware implementations ,FPGA ,Hardware Implementation - Abstract
Implementing the P systems on parallel hardware is a re- search highlight in bio-inspired computing since the membrane comput- ing is a large-scale parallel computing paradigm which have a potential to tremendously speed up the computation. Field-programmable gate arrays (FPGAs) and CUDA-enabled GPUs are the primary hardware which is employed to implement P systems. FPGA-based hardware im- plementations use different strategies considering regions or evolution rules as processing units. This implies the existence of several parallel architectures for FPGAs specially designed to implement P systems. In contrast, the CUDA-enabled GPUs are a pre-defined parallel platform and numerous types of P systems are directly implemented on it. The object distribution problem (choosing which rules will be applied) is the core problem of all hardware implementations. This problem is par- ticularly difficult, because in the general case the model of P systems is non-deterministic and maximally parallel, hence the corresponding prob- lem is NP-hard. Several heuristics were proposed in order to accelerate the process of the computation of the corresponding ruleset. In this article we overview different approaches and designs for hardware implementations of P systems as well as corresponding solutions to the object assignment problem
- Published
- 2020
9. Reaction Systems and Synchronous Digital Circuits
- Author
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Sergey Verlan, Shang Zeyi, Gexiang Zhang, Ion Petre, Southwest Jiaotong University (SWJTU), Laboratoire d'Algorithmique Complexité et Logique (LACL), Université Paris-Est Créteil Val-de-Marne - Paris 12 (UPEC UP12), Åbo Akademi University [Turku], and Xihua University (XHU)
- Subjects
reaction systems ,Relation (database) ,Computer science ,Biochemical Phenomena ,Pharmaceutical Science ,0102 computer and information sciences ,02 engineering and technology ,Living cell ,computer.software_genre ,01 natural sciences ,Article ,Analytical Chemistry ,lcsh:QD241-441 ,lcsh:Organic chemistry ,[INFO.INFO-FL]Computer Science [cs]/Formal Languages and Automata Theory [cs.FL] ,Drug Discovery ,field-programming gate arrays ,Physical and Theoretical Chemistry ,Field-programmable gate array ,ComputingMilieux_MISCELLANEOUS ,Electronic circuit ,Digital electronics ,business.industry ,Computers ,Organic Chemistry ,021001 nanoscience & nanotechnology ,Computer architecture ,010201 computation theory & mathematics ,Chemistry (miscellaneous) ,Molecular Medicine ,synchronous digital circuits ,Compiler ,Reaction system ,Electronics ,0210 nano-technology ,business ,computer ,Algorithms - Abstract
A reaction system is a modeling framework for investigating the functioning of the living cell, focused on capturing cause&ndash, effect relationships in biochemical environments. Biochemical processes in this framework are seen to interact with each other by producing the ingredients enabling and/or inhibiting other reactions. They can also be influenced by the environment seen as a systematic driver of the processes through the ingredients brought into the cellular environment. In this paper, the first attempt is made to implement reaction systems in the hardware. We first show a tight relation between reaction systems and synchronous digital circuits, generally used for digital electronics design. We describe the algorithms allowing us to translate one model to the other one, while keeping the same behavior and similar size. We also develop a compiler translating a reaction systems description into hardware circuit description using field-programming gate arrays (FPGA) technology, leading to high performance, hardware-based simulations of reaction systems. This work also opens a novel interesting perspective of analyzing the behavior of biological systems using established industrial tools from electronic circuits design.
- Published
- 2019
- Full Text
- View/download PDF
10. An Overview of Hardware Implementation of Membrane Computing Models
- Author
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Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Ministerio de Economia, Industria y Competitividad (MINECO). España, Zhang, Gexiang, Shang, Zeyi, Verlan, Sergey, Martínez del Amor, Miguel Ángel, Yuan, Chengxun, Valencia Cabrera, Luis, Pérez Jiménez, Mario de Jesús, Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Ministerio de Economia, Industria y Competitividad (MINECO). España, Zhang, Gexiang, Shang, Zeyi, Verlan, Sergey, Martínez del Amor, Miguel Ángel, Yuan, Chengxun, Valencia Cabrera, Luis, and Pérez Jiménez, Mario de Jesús
- Abstract
The model of membrane computing, also known under the name of P systems, is a bio-inspired large-scale parallel computing paradigm having a good potential for the design of massively parallel algorithms. For its implementation it is very natural to choose hardware platforms that have important inherent parallelism, such as field-programmable gate arrays (FPGAs) or compute unified device architecture (CUDA)-enabled graphic processing units (GPUs). This article performs an overview of all existing approaches of hardware implementation in the area of P systems. The quantitative and qualitative attributes of FPGA-based implementations and CUDA-enabled GPU-based simulations are compared to evaluate the two methodologies.
- Published
- 2020
11. An Overview of Hardware Implementations of P Systems
- Author
-
Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Universidad de Sevilla. TIC193: Computación Natural, Shang, Zeyi, Verlan, Sergey, Zhang, Gexiang, Martínez del Amor, Miguel Ángel, Valencia Cabrera, Luis, Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Universidad de Sevilla. TIC193: Computación Natural, Shang, Zeyi, Verlan, Sergey, Zhang, Gexiang, Martínez del Amor, Miguel Ángel, and Valencia Cabrera, Luis
- Abstract
Implementing the P systems on parallel hardware is a research highlight in bio-inspired computing since the membrane computing is a large-scale parallel computing paradigm which have a potential to tremendously speed up the computation. Field-programmable gate arrays (FPGAs) and CUDA-enabled GPUs are the primary hardware which is employed to implement P systems. FPGA-based hardware implementations use different strategies considering regions or evolution rules as processing units. This implies the existence of several parallel architectures for FPGAs specially designed to implement P systems. In contrast, the CUDA-enabled GPUs are a pre-defined parallel platform and numerous types of P systems are directly implemented on it. The object distribution problem (choosing which rules will be applied) is the core problem of all hardware implementations. This problem is particularly difficult, because in the general case the model of P systems is non-deterministic and maximally parallel, hence the corresponding problem is NP-hard. Several heuristics were proposed in order to accelerate the process of the computation of the corresponding ruleset. In this article we overview different approaches and designs for hardware implementations of P systems as well as corresponding solutions to the object assignment problem.
- Published
- 2020
12. FPGA Implementation of Robot Obstacle Avoidance Controller based on Enzymatic Numerical P Systems
- Author
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Shang, Zeyi, Verlan, Sergey, Zhang, Gexiang, Pérez Hurtado de Mendoza, Ignacio, Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, and Universidad de Sevilla. TIC193 : Computación Natural
- Subjects
Universal asynchronous receiver/transmitter (UART) ,Numerical P system ,Enzymatic numerical P systems ,Field Programmable Gate Array (FPGA) ,Membrane computing ,Robot membrane controller - Abstract
It is a long-cherished wish to implement numerical P systems (NPS) on a parallel architecture so that its large scale parallelism can be exploited to speedup computation tremendously. FPGA is a reconfigurable hardware in which operations are triggered so synchronized by edge or level of activating signals, making it an eligible platform to implement NPS and its variant, enzymatic numerical P system (ENPS). In this article, a NPS and a ENPS designed as robot controllers are implemented in FPGA, achieving a speedup of 105 comparing to software simulation. FPGA hardened NPS in this research can be regarded as a heterogeneous multicore processor since membranes inside work as processing units which possess different functions. FPGA hardened NPS is imparted universal asynchronous receiver/transmitter (UART) communication ability to push it closer to real-life application. FPGA hardened ENPS consume less hardware resources and power for less complicate membrane structures and processes.
- Published
- 2019
13. Reaction Systems and Synchronous Digital Circuits
- Author
-
Shang, Zeyi, primary, Verlan, Sergey, additional, Petre, Ion, additional, and Zhang, Gexiang, additional
- Published
- 2019
- Full Text
- View/download PDF
14. FPGA Implementation of Robot Obstacle Avoidance Controller based on Enzymatic Numerical P Systems
- Author
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Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Universidad de Sevilla. TIC193 : Computación Natural, Shang, Zeyi, Verlan, Sergey, Zhang, Gexiang, Pérez Hurtado de Mendoza, Ignacio, Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Universidad de Sevilla. TIC193 : Computación Natural, Shang, Zeyi, Verlan, Sergey, Zhang, Gexiang, and Pérez Hurtado de Mendoza, Ignacio
- Abstract
It is a long-cherished wish to implement numerical P systems (NPS) on a parallel architecture so that its large scale parallelism can be exploited to speedup computation tremendously. FPGA is a reconfigurable hardware in which operations are triggered so synchronized by edge or level of activating signals, making it an eligible platform to implement NPS and its variant, enzymatic numerical P system (ENPS). In this article, a NPS and a ENPS designed as robot controllers are implemented in FPGA, achieving a speedup of 105 comparing to software simulation. FPGA hardened NPS in this research can be regarded as a heterogeneous multicore processor since membranes inside work as processing units which possess different functions. FPGA hardened NPS is imparted universal asynchronous receiver/transmitter (UART) communication ability to push it closer to real-life application. FPGA hardened ENPS consume less hardware resources and power for less complicate membrane structures and processes.
- Published
- 2019
15. An Overview of Hardware Implementations of P Systems
- Author
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Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Universidad de Sevilla. TIC193 : Computación Natural, Shang, Zeyi, Verlan, Sergey, Zhang, Gexiang, Martínez del Amor, Miguel Ángel, Valencia Cabrera, Luis, Universidad de Sevilla. Departamento de Ciencias de la Computación e Inteligencia Artificial, Universidad de Sevilla. TIC193 : Computación Natural, Shang, Zeyi, Verlan, Sergey, Zhang, Gexiang, Martínez del Amor, Miguel Ángel, and Valencia Cabrera, Luis
- Abstract
Implementing the P systems on parallel hardware is a re- search highlight in bio-inspired computing since the membrane comput- ing is a large-scale parallel computing paradigm which have a potential to tremendously speed up the computation. Field-programmable gate arrays (FPGAs) and CUDA-enabled GPUs are the primary hardware which is employed to implement P systems. FPGA-based hardware im- plementations use different strategies considering regions or evolution rules as processing units. This implies the existence of several parallel architectures for FPGAs specially designed to implement P systems. In contrast, the CUDA-enabled GPUs are a pre-defined parallel platform and numerous types of P systems are directly implemented on it. The object distribution problem (choosing which rules will be applied) is the core problem of all hardware implementations. This problem is par- ticularly difficult, because in the general case the model of P systems is non-deterministic and maximally parallel, hence the corresponding prob- lem is NP-hard. Several heuristics were proposed in order to accelerate the process of the computation of the corresponding ruleset. In this article we overview different approaches and designs for hardware implementations of P systems as well as corresponding solutions to the object assignment problem
- Published
- 2017
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