14 results on '"Shanfeng Cheng"'
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2. 6.8 mW 2.5 Gb/s and 42.5 mW 5 Gb/s 1: 8 CMOS demultiplexers.
3. A fully integrated power-management solution for a 65nm CMOS cellular handset chip.
4. An LC Quadrature VCO Using Capacitive Source Degeneration Coupling to Eliminate Bi-Modal Oscillation.
5. An Injection-Locked Frequency Divider With Multiple Highly Nonlinear Injection Stages and Large Division Ratios.
6. Steady-State Analysis of Phase-Locked Loops Using Binary Phase Detector.
7. A Fully Differential Low-Power Divide-by-8 Injection-Locked Frequency Divider Up to 18 GHz.
8. Design and Analysis of an Ultrahigh-Speed Glitch-Free Fully Differential Charge Pump With Minimum Output Current Variation and Accurate Matching.
9. An LC Quadrature VCO Using Capacitive Source Degeneration Coupling to Eliminate Bi-Modal Oscillation
10. A Fully Differential Low-Power Divide-by-8 Injection-Locked Frequency Divider Up to 18 GHz
11. A fully integrated power-management solution for a 65nm CMOS cellular handset chip
12. 6.8 mW 2.5 Gb/s and 42.5 mW 5 Gb/s 1:8 CMOS demultiplexers
13. A fully integrated power-management solution for a 65nm CMOS cellular handset chip.
14. 6.8 mW 2.5 Gb/s and 42.5 mW 5 Gb/s 1:8 CMOS demultiplexers.
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