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The impact of radiation on MoS2-based devices is an important factor in the utilization of two-dimensional semiconductor-based technology in radiation-sensitive environments. In this study, the effects of gamma irradiation on the electrical variations in MoS2 field-effect transistors with buried local back-gate structures were investigated, and their related effects on Al2O3 gate dielectrics and MoS2/Al2O3 interfaces were also analyzed. The transfer and output characteristics were analyzed before and after irradiation. The current levels decreased by 15.7% under an exposure of 3 kGy. Additionally, positive shifts in the threshold voltages of 0.50, 0.99, and 1.15 V were observed under irradiations of 1, 2, and 3 kGy, respectively, compared to the non-irradiated devices. This behavior is attributable to the comprehensive effects of hole accumulation in the Al2O3 dielectric interface near the MoS2 side and the formation of electron trapping sites at the interface, which increased the electron tunneling at the MoS2 channel/dielectric interface.

Two-dimensional (2D) transition-metal dichalcogenides (TMDs) materials, such as molybdenum disulfide (MoS2), stand out due to their atomically thin layered structure and exceptional electrical properties. Consequently, they could potentially become one of the main materials for future integrated high-performance logic circuits. However, the local back-gate-based MoS2 transistors on a silicon substrate can lead to the degradation of electrical characteristics. This degradation is caused by the abnormal effect of gate sidewalls, leading to non-uniform field controllability. Therefore, the buried-gate-based MoS2 transistors where the gate electrodes are embedded into the silicon substrate are fabricated. The several device parameters such as field-effect mobility, on/off current ratio, and breakdown voltage of gate dielectric are dramatically enhanced by field-effect mobility (from 0.166 to 1.08 cm2/V·s), on/off current ratio (from 4.90 × 105 to 1.52 × 107), and breakdown voltage (from 15.73 to 27.48 V) compared with a local back-gate-based MoS2 transistor, respectively. Integrated logic circuits, including inverters, NAND, NOR, AND, and OR gates, were successfully fabricated by 2-inch wafer-scale through the integration of a buried-gate MoS2 transistor array.