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Spin-Hall-effect nano-oscillators are promising beyond the CMOS devices currently available, and can potentially be used to emulate the functioning of neurons in computational neuromorphic systems. As they oscillate in the 4–20 GHz range, they could potentially be used for building highly accelerated neural hardware platforms. However, due to their extremely low signal level and high impedance at their output, as well as their microwave-range operating frequency, discerning whether the SHNO is oscillating or not carries a great challenge when its state read-out circuit is implemented using CMOS technologies. This paper presents the first CMOS front-end read-out circuitry, implemented in 180 nm, working at a SHNO oscillation frequency up to 4.7 GHz, managing to discern SHNO amplitudes of 100 µV even for an impedance as large as 300 Ω and a noise figure of 5.3 dB300 Ω. A design flow of this front end is presented, as well as the architecture of each of its blocks. The study of the low-noise amplifier is deepened for its intrinsic difficulties in the design, satisfying the characteristics of SHNOs.

Analog implementation of Oscillatory Neural Networks (ONNs) has the potential to implement fast and ultra-low-power computing capabilities. One of the drawbacks of analog implementation is component mismatches which cause desynchronization and instability in ONNs. Emerging devices like memristors and VO2are particularly prone to variations. In this paper, we study the effect of component mismatches on the performance of differential ONNs (DONNs). Mismatches were considered in two main blocks: differential oscillatory neurons and synaptic circuits. To measure DONN tolerance to mismatches in each block, performance was evaluated with mismatches being present separately in each block. Memristor-bridge circuits with four memristors were used as the synaptic circuits. The differential oscillatory neurons were based on VO2-devices. The simulation results showed that DONN performance was more vulnerable to mismatches in the components of the differential oscillatory neurons than to mismatches in the synaptic circuits. DONNs were found to tolerate up to 20% mismatches in the memristance of the synaptic circuits. However, mismatches in the differential oscillatory neurons resulted in non-uniformity of the natural frequencies, causing desynchronization and instability. Simulations showed that 0.5% relative standard deviation (RSD) in natural frequencies can reduce DONN performance dramatically. In addition, sensitivity analyses showed that the high threshold voltage of VO2-devices is the most sensitive parameter for frequency non-uniformity and desynchronization.

[ES] Sensor de visión dinámico foveado electrónicamente. El sensor de visión comprende una matriz (1) de píxeles (5) sobre los que se aplica un mecanismo de foveación, definiendo una serie de regiones de baja resolución de píxeles agrupados (macro-píxeles), de manera que trabajan como un único pixel (5) aislado, obteniéndose información del grupo de píxeles (5) y no de cada pixel (5) de manera individual. Gracias a las regiones de baja resolución de macro-pixeles se logra un ahorro de energía y ancho de banda de datos en favor de las regiones de alta resolución no agrupadas o foveadas. Las regiones de píxeles agrupados son configurables con señales electrónicas externas. Además, se pueden activar electrónicamente múltiples regiones de alta resolución o foveación y tamaños de región., [EN] The present invention relates to a vision sensor comprising a matrix (1) of pixels (5) on which a foveation mechanism is used, defining a series of low resolution regions of grouped pixels (macro-pixels) such that they operate as a single isolated pixel (5), information being obtained from the groups of pixels (5) and not from each pixel (5) individually. Due to the low resolution regions of macro-pixels, energy and data bandwidth savings are achieved in favour of the high resolution regions that are not grouped or foveated. The regions of grouped pixels can be configured with external electronic signals. In addition, multiple high resolution or foveation regions as well as region sizes can be electronically activated.

[EN] The present invention relates to a vision sensor comprising a matrix (1) of pixels (5) on which a foveation mechanism is used, defining a series of low resolution regions of grouped pixels (macro-pixels) such that they operate as a single isolated pixel (5), information being obtained from the groups of pixels (5) and not from each pixel (5) individually. Due to the low resolution regions of macro-pixels, energy and data bandwidth savings are achieved in favour of the high resolution regions that are not grouped or foveated. The regions of grouped pixels can be configured with external electronic signals. In addition, multiple high resolution or foveation regions as well as region sizes can be electronically activated., [ES] Sensor de visión dinámico foveado electrónicamente. El sensor de visión comprende una matriz (1) de píxeles (5) sobre los que se aplica un mecanismo de foveación, definiendo una serie de regiones de baja resolución de píxeles agrupados (macro-píxeles), de manera que trabajan como un único pixel (5) aislado, obteniéndose información del grupo de píxeles (5) y no de cada pixel (5) de manera individual. Gracias a las regiones de baja resolución de macro-pixeles se logra un ahorro de energía y ancho de banda de datos en favor de las regiones de alta resolución no agrupadas o foveadas. Las regiones de píxeles agrupados son configurables con señales electrónicas externas. Además, se pueden activar electrónicamente múltiples regiones de alta resolución o foveación y tamaños de región., [FR] Le capteur de vision comprend une matrice (1) de pixels (5) sur lesquels est appliqué un mécanisme de fovéation, définissant une série de régions de basse résolution de pixels regroupés (macro-pixels), de sorte qu'ils travaillent comme un seul pixel (5) isolé, ce qui permet d'obtenir des informations du groupe de pixels (5) et non de chaque pixel (5) de manière individuelle. Grâce aux régions de basse résolution de micro-pixels, on obtient une économie d'énergie et de largeur de bande de données en faveur des régions de haute résolution non regroupées ou fovéées. Les régions de pixels regroupés sont configurables avec des signaux électroniques externes. En outre, de multiples régions de haute résolution ou fovéation et de tailles de région multiples peuvent être activées électroniquement.

This paper describes a fully experimental hybrid system in which a 4×4 memristive crossbar spiking neural network (SNN) was assembled using custom high-resistance state memristors with analogue CMOS neurons fabricated in 180 nm CMOS technology. The custom memristors used NMOS selector transistors, made available on a second 180 nm CMOS chip. One drawback is that memristors operate with currents in the micro-amperes range, while analogue CMOS neurons may need to operate with currents in the pico-amperes range. One possible solution was to use a compact circuit to scale the memristor-domain currents down to the analogue CMOS neuron domain currents by at least 5–6 orders of magnitude. Here, we proposed using an on-chip compact current splitter circuit based on MOS ladders to aggressively attenuate the currents by over 5 orders of magnitude. This circuit was added before each neuron. This paper describes the proper experimental operation of an SNN circuit using a 4×4 1T1R synaptic crossbar together with four post-synaptic CMOS circuits, each with a 5-decade current attenuator and an integrate-and-fire neuron. It also demonstrates one-shot winner-takes-all training and stochastic binary spike-timing-dependent-plasticity learning using this small system.

Liquid State Machines (LSMs) are computing reservoirs composed of recurrently connected Spiking Neural Networks which have attracted research interest for their modeling capacity of biological structures and as promising pattern recognition tools suitable for their implementation in neuromorphic processors, benefited from the modest use of computing resources in their training process. However, it has been difficult to optimize LSMs for solving complex tasks such as event-based computer vision and few implementations in large-scale neuromorphic processors have been attempted. In this work, we show that offline-trained LSMs implemented in the SpiNNaker neuromorphic processor are able to classify visual events, achieving state-of-the-art performance in the event-based N-MNIST dataset. The training of the readout layer is performed using a recent adaptation of back-propagation-through-time (BPTT) for SNNs, while the internal weights of the reservoir are kept static. Results show that mapping our LSM from a Deep Learning framework to SpiNNaker does not affect the performance of the classification task. Additionally, we show that weight quantization, which substantially reduces the memory footprint of the LSM, has a small impact on its performance.

The advent of nanoscale memristors raised hopes of being able to build CMOL (CMOS/nanowire/molecular) type ultra-dense in-memory-computing circuit architectures. In CMOL, nanoscale memristors would be fabricated at the intersection of nanowires. The CMOL concept can be exploited in neuromorphic hardware by fabricating lower density neurons on CMOS and placing massive analog synaptic connectivity with nanowire and nanoscale-memristor fabric post-fabricated on top. However, technical problems have hindered such developments for presently available reliable commercial monolithic CMOS-memristor technologies. On one hand, each memristor needs a MOS selector transistor in series to guarantee forming and programming operations in large arrays. This results in compound MOS-memristor synapses (called 1T1R) which are no longer synapses at the crossing of nanowires. On the other hand, memristors do not yet constitute highly reliable, stable analog memories for massive analog-weight synapses with gradual learning. Here we demonstrate a pseudo-CMOL monolithic chip core that circumvents the two technical problems mentioned above by: (a) exploiting a CMOL-like geometrical chip layout technique to improve density despite the 1T1R limitation, and (b) exploiting a binary weight stochastic Spike-Timing-Dependent-Plasticity (STDP) learning rule that takes advantage of the more reliable binary memory capability of the memristors used. Experimental results are provided for a spiking neural network (SNN) CMOL-core with 64 input neurons, 64 output neurons and 4096 1T1R synapses, fabricated in 130nm CMOS with 200nm-sized Ti/HfOx/TiN memristors on top. The CMOL-core uses query-driven event read-out, which allows for memristor variability insensitive computations. Experimental system-level demonstrations are provided for plain template matching tasks, as well as regularized stochastic binary STDP feature-extraction learning, obtaining perfect recognition in hardware for a 4-letter recognition

Non-intrusive visual-based applications supporting the communication of people employing sign language for communication are always an open and attractive research field for the human action recognition community. Automatic sign language interpretation is a complex visual recognition task where motion across time distinguishes the sign being performed. In recent years, the development of robust and successful deep-learning techniques has been accompanied by the creation of a large number of databases. The availability of challenging datasets of Sign Language (SL) terms and phrases helps to push the research to develop new algorithms and methods to tackle their automatic recognition. This paper presents ‘SL-Animals-DVS’, an event-based action dataset captured by a Dynamic Vision Sensor (DVS). The DVS records non-fluent signers performing a small set of isolated words derived from SL signs of various animals as a continuous spike flow at very low latency. This is especially suited for SL signs which are usually made at very high speeds. We benchmark the recognition performance on this data using three state-of-the-art Spiking Neural Networks (SNN) recognition systems. SNNs are naturally compatible to make use of the temporal information that is provided by the DVS where the information is encoded in the spike times. The dataset has about 1100 samples of 59 subjects performing 19 sign language signs in isolation at different scenarios, providing a challenging evaluation platform for this emerging technology.