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1. Wafer-Level Characterization and Monitoring Platform for Single-Photon Avalanche Diodes

2. Quenching Circuit Discriminator Architecture Impact on a Sub-10 ps FWHM Single-Photon Timing Resolution SPAD

3. 3D Photon-To-Digital Converter for Radiation Instrumentation: Motivation and Future Works

4. Quenching Circuit and SPAD Integrated in CMOS 65 nm with 7.8 ps FWHM Single Photon Timing Resolution

5. Characterization of a Wafer-Level Packaged Au−Ru/AlCu Contact for Micro-Switches

7. Exploring Ru compatibility with Al-Ge eutectic wafer bonding

8. 22 μW, 5.1 ps LSB, 5.5 ps RMS jitter Vernier time‐to‐digital converter in CMOS 65 nm for single photon avalanche diode array

9. Imaging individual barium atoms in solid xenon for barium tagging in nEXO

10. Digital SiPM channel integrated in CMOS 65 nm with 17.5 ps FWHM single photon timing resolution

11. Reflectivity of VUV-sensitive Silicon Photomultipliers in Liquid Xenon

12. 3D Photon-to-Digital Converter for Radiation Instrumentation: Motivation and Future Works

14. Event Reconstruction in a Liquid Xenon Time Projection Chamber with an Optically-Open Field Cage

15. Spectral analysis of the topography parameters for isotropic Gaussian rough surfaces applied to gold coating

16. Wet Metallization of High Aspect Ratio TSV Using Electrografted Polymer Insulator to Suppress Residual Stress in Silicon

17. Submillimeter wave GaAs Schottky diode application based study and optimization for 0.1–1.5 THz

18. Reflectivity quenching of ESR multilayer polymer film reflector in optically bonded scintillator arrays

19. Review—The Mediating Effect of Chemically Oxidized Silicon Surface on the P4VP Electrografting for Silicon Electrical Insulation

20. Measurements of electron transport in liquid and gas Xenon using a laser-driven photocathode

21. Characterization of the Hamamatsu VUV4 MPPCs for nEXO

22. Reflectance of Silicon Photomultipliers at Vacuum Ultraviolet Wavelengths

23. Simulation of charge readout with segmented tiles in nEXO

24. Reflectivity and PDE of VUV4 Hamamatsu SiPMs in Liquid Xenon

25. DOI estimation through signal arrival time distribution: a theoretical description including proof of concept measurements

26. A 2D Proof of Principle Towards a 3D Digital SiPM in HV CMOS With Low Output Capacitance

27. Electrografted P4VP for High Aspect Ratio Copper TSV Insulation in Via-Last Process Flow

28. Measuring count rates free from correlated noise in digital silicon photomultipliers

29. A 256 Pixelated SPAD readout ASIC with in-Pixel TDC and embedded digital signal processing for uniformity and skew correction

30. Single Photon Avalanche Diodes and Vertical Integration Process for a 3D Digital SiPM using Industrial Semiconductor Technologies

31. Implementation Study of Single Photon Avalanche Diodes (SPAD) in <formula formulatype='inline'><tex Notation='TeX'>$0.8~\mu\hbox{m}$</tex> </formula> HV CMOS Technology

32. Sensitivity and discovery potential of the proposed nEXO experiment to neutrinoless double beta decay

33. Simulation of scintillation light output in LYSO scintillators through a full factorial design

34. Characterization of an Ionization Readout Tile for nEXO

35. High-Resistivity Silicon Dielectric Ribbon Waveguide for Single-Mode Low-Loss Propagation at F/G-Bands

36. Modeling of Single Photon Avalanche Diode Array Detectors for PET Applications

37. Powerful applications of electromagnetic field simulators: Field visualization for education

38. Niobium and Aluminum Josephson Junctions Fabricated with a Damascene CMP Process

39. Quenching Circuit and SPAD Integrated in CMOS 65 nm with 7.8 ps FWHM Single Photon Timing Resolution

40. Study of silicon photomultiplier performance in external electric fields

41. Electrical characteristics and simulations of self-switching-diodes in SOI technology

42. Simulation of signal losses in highly pixelated scintillator arrays read out by discrete photodetectors

43. Optimization of Single Photon Avalanche Diode array detectors with a custom simulator

44. Feasibility studies of ultra-small Josephson junctions for qubits

45. A low-cost fabrication method for sub-millimeter wave GaAs Schottky diode

46. Low-loss low-dispersive high-resistivity silicon dielectric slab waveguide for THz region

47. Processing Hundreds of Nanometres Thick Electrografted P4VP for High Aspect Ratio TSV Insulation

48. Development of a single photon avalanche diode (SPAD) array in high voltage CMOS 0.8 µm dedicated to a 3D integrated circuit (3DIC)

49. Hybrid modes propagation inside parallel plate waveguide using anisotropic graphene plate

50. The impact of etched trenches geometry and dielectric material on the electrical behaviour of silicon-on-insulator self-switching diodes

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