Search

The propagation of single event transients (SET) is measured and modeled in SOI and bulk inverter chains. The propagation-induced pulse broadening (PIPB) effect is shown to determine the SET pulse width measured at the output of long chains of inverters after irradiation. Initially, narrow transients, less than 200 ps at the struck inverter, are progressively broadened into the nanosecond range. PIPB is induced by dynamic floating body effects (also called history effects) in SOI and bulk transistors, which depend on the bias state of the transistors before irradiation. Implications for SET hardness assurance, circuit modelling and hardening are discussed. Floating body and PIPB effects are usually not taken into account in circuit models, which can lead to large underestimation of SET sensitivity when using simulation techniques like fault injection in complex circuits. Index Terms--Chains of inverters, heavy ions, propagation induced pulse broadening, pulsed laser, single event transients.

We characterized the responses of three erbium-doped fibers with slightly different concentrations of rare-earth ions (240-290 ppm) and [Al.sub.2][O.sub.3] (7-10 wt.%) during proton and [gamma]-ray exposures. We have simultaneously measured the radiation-induced attenuation (RIA) around the [Er.sup.3+] ion pumping wavelength (980 nm) and the associated changes of the [Er.sup.3+] emission around 1530 nm. The three erbium-doped fibers show similar radiation responses. All fibers exhibit RIA levels between 9 x [10.sup.-3] and 1.7 x [10.sup.-2] dB [m.sup.-1] [Gy.sup.-1] at 980 nm and between 4 x [10.sup.-3] and 1.1 x [10.sup.-2] dB [m.sup.-1] [Gy.sup.-1] at 1530 nm. Protons and [gamma]-rays lead to similar radiation damages, with small differences between the protons of different energies (50 MeV and 105 MeV). Furthermore, we have performed online measurements of the spectral dependence of RIA from 600 to 1600 nm and offline measurements from 1200 to 2400 nm. The three fibers exhibit the same spectral response. Losses decrease monotonically from the visible to the infrared part of the spectrum. We have performed spectral decomposition of these RIA curves with the help of absorption bands previously associated with radiation-induced point defects. Our analysis shows that the main part of the RIA (600-1700 nm) in erbium-doped glass can be explained by the generation of Al-related point defects. The other defects related to the germanium and phosphorus doping of the silica seem to have a lower contribution to the induced losses. The [Er.sup.3+] ion properties seem to be mainly unaffected by proton exposure, suggesting a solvation shell around the [Er.sup.3+] ion formed by [Al.sub.2][O.sub.3] species. Index Terms--Color centers, erbium, gamma, optical fibers, protons, radiation effects.

Experimental evidence and Monte-Carlo simulations for several technologies show that accurate SEE response predictions depend on a detailed description of the variability of radiation events (e.g., nuclear reactions), as opposed to the classical single-valued LET parameter. Rate predictions conducted with this simulation framework exhibit excellent agreement with the average observed SEU rate on NASA's MESSENGER mission to Mercury, while a prediction from the traditional IRPP method, which does not include the contribution from ion-ion reactions, falls well below the observed rate. While rate predictions depend on availability of technology information, the approach described here is sufficiently flexible that reasonably accurate results describing the response to irradiation can be obtained even in the absence of detailed information about the device geometry and fabrication process. Index Terms--Nuclear reactions, single event effects (SEE), single event effect rate.

The generation and propagation of single event transients (SET) is measured and modeled in SOI inverter chains with different designs. SET propagation in inverter chains induces significant modifications of the transient width. In some cases, a 'propagation-induced pulse broadening' (PIPB) effect is observed. Initially narrow transients, less than 200 ps at the struck node, are progressively broadened up to the nanosecond range, with the degree of broadening dependent on the transistor design and the length of propagation. The chain design (transistor size and load) is shown to have a major impact on the transient width modification. Index Terms--Chains of inverters, digital single event transients, heavy ion and pulsed laser irradiation, propagation-induced pulse broadening (PIPB) effect, SET propagation, SET width.

The effects of heavy ion energy and nuclear interactions on the single-event upset (SEU) and single-event latchup (SEL) response of commercial and radiation-hardened CMOS ICs are explored. Above the threshold LET for direct ionization-induced upsets, little difference is observed in single-event upset and latchup cross sections measured using low versus high energy heavy ions. However, significant differences between low- and high-energy heavy ion test results are observed below the threshold LET for single-node direct ionization-induced upsets. The data suggest that secondary particles produced by nuclear interactions play a role in determining the SEU and SEL hardness of integrated circuits, especially at low LET. The role of nuclear interactions and implications for radiation hardness assurance and rate prediction are discussed. Index Terms--Indirect ionization, integrated circuit reliability, nuclear reactions, radiation effects, radiation hardness assurance, single-event effects, single-event latchup, single-event upset, soft errors.

Transistors and ICs were irradiated at dose rates from 0.2 to 2 x [10.sup.9] rad(Si[O.sub.2])/s using a wide range of radiation sources. The mechanisms causing parametric IC failure varied with dose rate. At low dose rates from 0.2 to 100 rad(Si[O.sub.2])/s, parametric IC failure in these devices was dominated by radiation-induced degradation of the gate oxide transistors. At dose rates from 1.8 x [10.sup.3] to [10.sup.6] rad(Si[O.sub.2])/s, parametric IC degradation was dominated by large increases in radiation-induced parasitic field oxide leakage current. At very high dose rates of 2 x [10.sup.9] rad(Si[O.sub.2])/s, no parametric failure was observed due to debiasing effects caused by rail-span collapse. These differences in dose rate response can make hardness assurance testing for high dose rate environments very challenging. Simple 'overtests' at dose rates from 50 to 300 rad(Si[O.sub.2])/s may greatly underestimate the radiation hardness of ICs in high dose rate environments. Because the failure mechanism may vary with dose rate, circuit design, and/or device technology, the best procedure for ensuring IC radiation hardness in greater than 300 rad(Si[O.sub.2])/s environments is to use radiation sources that mimic the system environment. Index Terms--Dose rate effects, electron radiation, hardness assurance, IC degradation, LINAC radiation, proton radiation, total dose radiation, transistor degradation.

The impact of heavy ion energy on SEU and SEL in commercial and radiation-hardened CMOS SRAMs is explored. Provided the ion range is large enough for the ions to reach the sensitive device region, standard low-energy heavy ion testing is conservative with respect to high-energy heavy ions, at least for LETs above the threshold for direct ionization-induced upsets. However, below the threshold LET for direct ionization-induced effects we find some differences between low- and high-energy tests. These differences are attributed to the effects of nuclear reaction-induced secondary particles. Implications for hardness assurance testing and error rate calculations are discussed. Index Terms--Indirect ionization, integrated circuit reliability, nuclear reactions, radiation effects, radiation hardness assurance, single event effects, single event latchup, single event upset.

The statistical transient response of floating body SOI and bulk devices is measured under proton and heavy ion irradiation. The influence of the device architecture is analyzed in detail for several generations of technologies, from 0.25 [micro]m to 70 nm. The effects of the measured transients on SET sensitivity are investigated. The amount of collected charge and the shape of the transient currents are shown to have a significant impact on the temporal width of propagating transients. Finally, based on our measured data, the threshold LET and the critical transient width for unattenuated propagation are calculated for both bulk and floating body SOI as a function of technology scaling. We show that the threshold LETs and the critical transient widths for bulk and floating body SOI devices are similar. Body ties can be used to harden SOI ICs to digital SET. However, the primary advantage of SOI technologies, even with a floating body design, mostly lies in shorter transients, at a given ion LET, for SOI technologies than for bulk technologies. Index Terms--Collected charge, heavy ion and proton irradiation, single event transient, SOI and bulk transistors, statistical response, transient current, transient width.

The effect of proton angle of incidence on proton-induced single-event latchup (SEL) is investigated in detail at room and elevated temperatures in present-day SRAMs. SRAMs from seven different vendors were irradiated at proton energies from 50 to 200 MeV, at temperatures of 25 [degrees]C and 75 [degrees]C, and at angles of incidence from 0[degrees] (normal) to 85[degrees] (grazing). The effects of angle of incidence were also investigated for neutron-induced SEL. The angle of incidence can significantly impact SEL hardness. For one SRAM at a temperature of 75 [degrees]C, characterizing SEL cross section at grazing angle resulted in a 16 times increase in SEL cross section. Large increases in SEL cross section with angle were also observed for other SRAMs characterized at room temperature. These increases in SEL cross section with angle of incidence are much larger than those measured previously for older SRAM technologies. The mechanism for the effect of angle of incidence on SEL cross section is not due simply to the deposition of more energy in the sensitive volume caused by an increase in path length as the angle of incidence is increased. To investigate possible mechanisms nuclear scattering calculations were performed and combined with device simulations. Simulation results suggest that the mechanism is a consequence of the linear energy transfer (LET) and range distributions of secondary ions produced by proton-material (or neutron-material) interactions coupled with an increase in SEL sensitivity (decrease in LET threshold) as angle of incidence is increased. These results have significant impact on SEL hardness assurance testing, especially for system applications where latchups cannot be tolerated. To best ensure that SEL hardness requirement are met, SRAMs should be characterized at both grazing and normal angles of incidence, and at maximum temperature, voltage, and proton energy. Index Terms--Hardness assurance, proton radiation effects, single-event effects, single-event latchup.

The effect of total dose on SEU hardness is investigated as a function of temperature and power supply voltage to determine worst-case hardness assurance test conditions for space environments. SRAMs from six different vendors were characterized for single-event upset (SEU) hardness at proton energies from 20 to 500 MeV and at temperatures of 25 and 80[degrees]C after total dose irradiating the SRAMs with either protons, Co-60 gamma rays, or low-energy x-rays. It is shown that total dose irradiation and the memory pattern written to the memory array during total dose irradiation and SEU characterization can substantially affect SEU hardness for some SRAMs. For one SRAM, the memory pattern made more than two orders of magnitude difference in SEU cross section at the highest total dose level examined. For all SRAMs investigated, the memory pattern that led to the largest increase in SEU cross section was the same memory pattern that led to the maximum increase in total-dose induced power supply leakage current. In addition, it is shown that increasing the temperature during SEU characterization can also increase the effect of total dose on SEU hardness. As a result, worst-case SEU hardness assurance test conditions are the maximum total dose and temperature of the system environment, and the minimum operating voltage of the SRAM. Possible screens for determining whether or not the SEU cross section of an SRAM will vary with total dose, based on the magnitude of the increase in power supply leakage current with total dose or the variation in SEU cross section with power supply voltage, have been suggested. In contrast to previous works, our results using selective area x-ray irradiations show that the source of the effect of total dose on SEU hardness is radiation-induced leakage currents in the memory cells. The increase in SEU cross section with total dose appears to be consistent with radiation-induced currents originating in the memory calls affecting the output bias levels of bias level shift circuitry used to control the voltage levels to the memory cells and/or due to the lowering of the noise margin of individual memory cells caused by radiation-induced leakage currents. Index Terms--Hardness assurance, proton irradiation, single-event upset.

The effect of proton energy on single-event latchup (SEL) in present-day SRAMs is investigated over a wide range of proton energies and temperature. SRAMs from five different vendors were irradiated at proton energies from 20 to 500 MeV and at temperatures of 25[degrees] and 85[degrees]C. For the SRAMs and radiation conditions examined in this work, proton energy SEL thresholds varied from as low as 20 MeV to as high as 490 MeV. To gain insight into the observed effects, the heavy-ion SEL linear energy transfer (LET) thresholds of the SRAMs were measured and compared to high-energy transport calculations of proton interactions with different materials. For some SRAMs that showed proton-induced SEE the heavy-ion SEL threshold LET was as high as 25 MeV-[cm.sup.2]/mg. Proton interactions with Si cannot generate nuclear recoils with LETs this large. Our nuclear scattering calculations suggest that the nuclear recoils are generated by proton interactions with tungsten. Tungsten plugs are commonly used in most high-density ICs fabricated today, including SRAMs. These results demonstrate that for system applications where latchups cannot be tolerated, SEL hardness assurance testing should be performed at a proton energy at least as high as the highest proton energy present in the system environment. Moreover, the best procedure to ensure that ICs will be latchup free in proton environments may be to use a heavy-ion source with LETs [greater than or equal to] 40 MeV-[cm.sup.2]/mg.

This paper investigates the transient response of 50-nm gate length fully and partially depleted SOI and bulk devices to pulsed laser and heavy ion microbeam irradiations. The measured transient signals on 50-nm fully depleted devices are very short, and the collected charge is small compared to older 0.25-[micro]m generation SOI and bulk devices. We analyze in detail the influence of the SOI architecture (fully or partially depleted) on the pulse duration and the amount of bipolar amplification. For bulk devices, the doping engineering is shown to have large effects on the duration of the transient signals and on the charge collection efficiency. Index Terms--Collected charge, heavy ion, pulsed laser, SOI and bulk transistors, transient current.

The impact of total ionizing dose and displacement damage on single-event upset and single-event latchup hardness assurance testing of present-day commercial SRAMs is studied over a wide range of proton energies and fluence levels. Commercial SRAMs from six different vendors were irradiated at proton energies from 8 to 500 MeV and at total doses from 0 to 100 krad(Si) using multiple radiation sources. For some SRAMs, the single-event upset cross section increased with total dose. The amount of increase in SEU cross section strongly depended on the bias configuration during total dose irradiation and single-event upset characterization. For most of the SRAMs that showed an increase in single-event upset cross section with total dose, the static power supply leakage current also increased. Light emission microscopy photographs identified the source of the increase in power supply leakage current for these SRAMs as originating in peripheral transistors outside the memory array. This suggests a new single-event upset mechanism for present-day devices, which may be due to a reduction in the internally supplied memory array bias level with total dose, increasing memory cell sensitivity to single-event upset. The proton energy at which the single-event latchup cross section saturated varied considerably between devices. For one technology, the single-event latchup cross section did not saturate until the proton energy was increased to 200 MeV. These data indicate that single-event latchup hardness assurance testing should be performed at high proton energies (> 100 MeV). For fluence levels less than [10.sub.11] protons/[cm.sub.2] at a proton energy of 105 MeV, proton-induced displacement damage had no observable affect on single-event latchup cross section. The implications of these effects on single-event upset and latchup hardness assurance testing are discussed. Index Terms--Integrated circuit reliability, integrated circuit testing, proton testing, radiation effects, radiation hardening (electronics), radiation response, single event effects, single event latchup, single event upset.

Mechanisms for single-event gate rupture (SEGR) in MOS capacitors and linear integrated circuits (ICs) are explored at ion energies greater than 1 GeV. We find that SEGR thresholds depend strongly on ion energy, but are independent of oxide defects, bias polarity, doping concentration, and ionizing dose. The number of SEGR strikes across a MOS capacitor was measured, and the SEGR response cross section distinctly shows an electric field threshold. The importance of having stiffening and speedup capacitors at the device is discussed. Index Terms--Catastrophic gate oxide failure, dielectric gate rupture, linear devices, single-event gate rupture (SEGR).

This paper investigates the charge collection mechanisms occurring in heavy ion irradiated metal oxide semiconductor (MOS) devices. The parasitic bipolar effect, inherent to the structure of SOI transistors, is shown to exist in bulk NMOS transistors as well. We experimentally show that the drain junction of an OFF-state bulk MOS transistor collects more charge than an identical junction isolated from neighboring elements. In other words, the proximity of the source junction and the triggering of the bipolar-like structure are responsible of charge amplification. A higher current peak on the drain is observed, and this enhancement effect is high enough to invalidate usual charge collection models based only on funnel and diffusion transport. Thus, the proximity of other junctions has to be considered to improve charge collection model in bulk technologies. Index Terms--Bipolar amplification, bulk and SOI transistors, charge collection, heavy ion irradiation, transport by funnelling and diffusion.

We have studied the 1/f noise and total-dose response associated with the buried oxides (BOX) of fully depleted nMOS silicon-on-insulators (SOI) transistors. Silicon implantation in the BOX creates a higher density of oxygen vacancy-related defects that reduce the net oxide-trap charge, but increase the back-channel 1/f noise. The 1/f noise of MOSFETs fabricated on silicon-implanted SOI BOX shows little change after 1 Mrad(Si[O.sub.2]) irradiation. Silicon implantation also creates shallow electron traps in the BOX, leading to large bias instabilities. Whether these traps are filled or empty does not significantly affect the 1/f noise. A detailed study of the 1/f noise, temperature dependence of charge trapping, and radiation response of these SOI nMOSFET transistors shows that charge exchange with shallow electron traps in the BOX occurs mostly via tunneling. Low frequency noise in the double-gate (DG) mode of device operation is also investigated, and found to help mitigate the 1/f noise in fully depleted SOI MOSFETs. Index Terms--1/f noise, charge trapping, electron traps, oxygen vacancies, radiation effects, Si implantation, silicon-on-insulator (SOI), total ionizing dose.

NMOS transistors were irradiated using X-ray, Co-60 gamma, electron, and proton radiation sources. The charge yield was estimated for protons of different energies and electrons, and compared with values obtained for X-ray and Co-60 irradiations. Index Terms--Charge yield, initial recombination, ionizing radiation, metal oxide semiconductor, MOS, total dose, transistors.

This paper analyzes the collected charge in heavy ion irradiated MOS structures. The charge generated in the substrate induces a displacement effect which strongly depends on the capacitor structure. Networks of capacitors are particularly sensitive to charge sharing effects. This has important implications for the reliability of SOI and DRAMs which use isolation oxides as a key elementary structure. The buried oxide of presentday and future SOI technologies is thick enough to avoid a significant collection from displacement effects. On the other hand, the retention capacitors of trench DRAMs are particularly sensitive to charge release in the substrate. Charge collection on retention capacitors participate to the MBU sensitivity of DRAM. Index Terms--Capacitors, charge collection, charge sharing, device simulation, diodes, DRAMs, heavy ion irradiation, isolation oxides, MBU sensitivity, MOS structures, SOI technology, SRAMs, transient currents, trench capacitors.

We examine the total-dose radiation response of capacitors and transistors with stacked [Al.sub.2][O.sub.3] on oxynitride gate dielectrics with Al and poly-Si gates after irradiation with 10 keV X-rays. The midgap voltage shift increases monotonically with dose and depends strongly on both [Al.sub.2][O.sub.3] and Si[O.sub.x][N.sub.y] thickness. The thinnest dielectrics, of most interest to industry, are extremely hard to ionizing irradiation, exhibiting only ~50 mV of shift at a total dose of 10 Mrad (Si[O.sub.2]) for the worst case bias condition. Oxygen anneals are found to improve the total dose radiation response by ~50% and induce a small amount of capacitance-voltage hysteresis. [Al.sub.2][O.sub.3]/Si[O.sub.x][N.sub.y] dielectrics which receive a ~ 1000[degrees]C dopant activation anneal trap ~12% more of the initial charge than films annealed at 550[degrees]C. Charge pumping measurements show that the interface trap density decreases with dose up to 500 krad (Si[O.sub.2]). This surprising result is discussed with respect to hydrogen effects in alternative dielectric materials, and may be the result of radiation-induced hydrogen passivation of some of the near-interfacial defects in these gate dielectrics. Index Terms--Alternative dielectric, annealing, bias dependence, charge pumping, electron tunneling, high-k, interface trap, MOS capacitor, oxide trapped charge, processing, radiation effects, radiation response.

Silicon-on-insulator (SOI) technologies have been developed for radiation-hardened applications for many years and are rapidly becoming a main-stream commercial technology. The authors review the total dose, single-event effects, and dose rate hardness of SOI devices. The total dose response of SOI devices is more complex than for bulk-silicon devices due to the buried oxide. Radiation-induced trapped charge in the buried oxide can increase the leakage current of partially depleted transistors and decrease the threshold voltage and increase the leakage current of fully depleted transistors. Process techniques that reduce the net amount of radiation-induced positive charge trapped in the buried oxide and device design techniques that mitigate the effects of trapped charge in the buried oxide have been developed to harden SOI devices to bulk-silicon device levels. The sensitive volume for charge collection in SOI technologies is much smaller than for bulk-silicon devices potentially making SOI devices much harder to single-event upset (SEU). However, bipolar amplification caused by floating body effects can significantly reduce the SEU hardness of SOI devices. Body ties are used to reduce floating body effects and improve SEU hardness. SOI ICs are completely immune to classic four-layer p-n-p-n single-event latchup; however, floating body effects make SOI ICs susceptible to single-event snapback (single transistor latch). The sensitive volume for dose rate effects is typically two orders of magnitude lower for SOI devices than for bulk-silicon devices. By using body ties to reduce bipolar amplification, much higher dose rate upset levels can be achieved for SOI devices than for bulk-silicon devices. Index Terms--Dose rate effects, radiation effects, silicon-on-insulator (SOI), single event effects, total dose effects.

Hafnium-silicate capacitors with 4.5-nm equivalent oxide thickness gate insulators were irradiated with 10-keV X-rays. The midgap and flatband voltage shifts in these devices increase linearly with dose and are significantly larger than the shifts seen in high quality, thermal Si[O.sub.2] gate oxides of similar electrical thickness. The standard trapping efficiency equation is adapted for calculating effective trapping efficiencies in alternative dielectrics and used to compare the radiation response of hafnium silicate to Si[O.sub.2] from several manufacturers. The effects of common reliability screens such as 'burn-in' and bias stress tests are also discussed. It is shown that baking these devices can degrade their capacitance-voltage characteristics, and large applied voltages inject excess charge into the dielectric, which can lead to a misinterpretation of the radiation results. However, the radiation responses of these devices, coupled with the demonstrated resistance of these films to heavy-ion induced gate rupture in previous studies, suggest that alternative dielectrics to Si[O.sub.2] potentially could be integrated into future electronics technologies for many low-power space applications. Index Terms--Alternative dielectric film, burn-in effects, MOS capacitor, oxide trapped, radiation effects.

High-energy ion-irradiated 3.3-nm oxynitride film and 2.2-nm Si[O.sub.2]-film MOS capacitors show premature breakdown during subsequent electrical stress. This degradation in breakdown increases with increasing ion linear energy transfer (LET), increasing ion fluence, and decreasing oxide thickness. The reliability degradation due to high-energy ion-induced latent defects is explained by a simple percolation model of conduction through Si[O.sub.2] layers with irradiation and/or electrical stress-induced defects. Monitoring the gate-leakage current reveals the presence of latent defects in the dielectric films. These results may be significant to future single-event effects and single-event gate rupture tests for MOS devices and ICs with ultrathin gate oxides. Index Terms--Heavy-ion irradiation, radiation effect, single-event effect, ultra-thin gate dielectric films.

Focused ion microbeam and broadbeam heavy-ion experiments on capacitors and SRAMs are used to investigate increased saturation upset cross sections recently observed in some silicon-on-insulator (SOI) integrated circuits (ICs). Experiments performed on capacitors show a very strong bias and oxide thickness dependence for charge collection. In combination with three-dimensional (3-D) simulations, these data suggest that the mechanism for charge collection in capacitors is due to perturbation of the substrate electric fields by charge deposition in the substrate. For substrates biased in depletion, these perturbations induce displacement currents through the oxide. Charge collection by displacement currents can be substantially reduced or mitigated by using heavily doped substrates. Experiments performed on SRAMs also show enhanced charge collection from displacement currents. However, experimental data and 3-D simulations show that for SRAMs, a second mechanism also contributes to charge collection. The 3-D simulations suggest that the charge collection results from drain and body-tie heavy-ion strikes within a few tenths of a micron of the body-to-drain junctions. These charge collection mechanisms can substantially reduce the SEU hardness and soft-error reliability of commercial SOI ICs.

NMOS transistors were irradiated using X-ray, Co-60 gamma, electron, and proton radiation sources. The charge yield was estimated for protons of different energies and electrons and compared to values obtained for X-ray and Co-60 irradiations. Index Terms--Charge yield, initial recombination, ionizing radiation, metal oxide semiconductor, MOS, total dose, transistors.

Large-scale three-dimensional (3-D) device simulations, focused ion microscopy, and broadbeam heavy-ion experiments are used to determine and compare the SEU-sensitive volumes of bulk-Si and SOI CMOS SRAMs. Single-event upset maps and cross-section curves calculated directly from 3-D simulations show excellent agreement with broadbeam cross section curves and microbeam charge collection and upset images for 16 K bulk-Si SRAMs. Charge-collection and single-event upset (SEU) experiments on 64 K and 1 M SOI SRAMs indicate that drain strikes can cause single-event upsets in SOI ICs. 3-D simulations do not predict this result, which appears to be due to anomalous charge collection from the substrate through the buried oxide. This substrate charge-collection mechanism can considerably increase the SEU-sensitive volume of SOI SRAMs, and must be included in single-event models if they are to provide accurate predictions of SOI device response in radiation environments.

Silicon-on-insulator (SOI) and bulk-silicon transistors were irradiated using X-ray, Co-60 gamma, and proton radiation sources. Co-60 gamma irradiation generates larger radiation-induced threshold voltage shifts (by a factor of two) in SOI buried oxides and in parasitic field oxides under low-field conditions than X-ray or proton irradiation. For all devices examined, the radiation-induced threshold voltage shifts generated by X-ray irradiation were equal to, within experimental uncertainty, the radiation-induced threshold voltage shifts generated by proton irradiation. The differences in threshold voltage shifts for the different radiation sources are attributed to differences in stopping power and consequently charge yield. The results suggest that for simulating proton-rich space environments, X-ray laboratory radiation sources are better suited for hardness assurance testing than Co-60 gamma radiation sources. Using Co-60 gamma sources for hardness assurance testing will result in more conservative estimates of device failure levels. Thus, our results do not preclude the use of Co-60 gamma radiation sources for hardness assurance testing for proton-rich environments. For electron-rich space environments, Co-60 gamma radiation sources may be better suited for hardness assurance testing.

We present experimental results on single-event-induced breakdown in sub-5-nm plasma-enhanced Si[O.sub.2], nitrided Si[O.sub.2], [Al.sub.2][O.sub.3], Hf[O.sub.2], and [Zr.sub.0.4][Si.sub.1.6][O4] dielectrics typical of current and future-generation commercial gate oxides. These advanced oxides are found to be quite resistant to ion-induced breakdown. Radiation-induced soft breakdown was observed in some films with 342 MeV Au (LET = 80 MeV/mg/[cm.sup.2]) but not 340 MeV I (LET = 60 MeV/mg/[cm.sup.2]). The critical voltage to hard breakdown was found to scale with the square root of the physical oxide thickness, not with the energy stored on the gate capacitance. Alternative dielectrics with equivalent oxide thickness substantially below their physical thickness were found to exhibit significantly higher voltage to hard breakdown than Si[O.sub.2] counterparts. All of the samples reached ion-induced hard breakdown at applied voltages well above typical operating power-supply voltages; these findings bode well for the use of advanced commercial integrated circuits in space systems. Index Terms--Dielectric breakdown, dielectric reliability, scaling, single-event radiation effects.

The radiation response of mobile protons introduced into thermal oxides capped with poly-Si is investigated. Total dose irradiation data show that the cross section for capture of radiation-induced electrons by mobile protons is two orders of magnitude smaller than for electron capture by trapped holes. A consistent model is proposed to explain the weak temperature dependence of the capture process observed in this study as opposed to the strong increase in proton neutralization with increasing temperature observed in an earlier UV exposure study. In contrast with the behavior of SOI material, no post-irradiation trapping of mobile protons could be observed in the thermal Si[O.sub.2] layer of the Si/Si[O.sub.2]/Si structures studied in this work. In the second part of this work it is shown that, unlike the effect of annealing in a hydrogen containing ambient, proton implantation does not yield a significant number of mobile protons in the buried oxide of Si/Si[O.sub.2]/Si structures.

Effects of irradiation and annealing temperature on radiation-induced charge trapping are explored for MOS transistors. Transistors were irradiated with 10-keV x rays at temperatures from -25 to 100 [degrees] C and annealed at 100 [degrees] C for times up to 3.6x[10.sup.6] s. Transistor data were analyzed for the contributions of radiation-induced charge due to oxide traps, border traps, and interface traps. Increased irradiation temperature resulted in increased interface-trap and bordertrap buildup and decreased oxide-trapped charge buildup during irradiation. Interface-trap buildup immediately following irradiation for transistors irradiated at 100 [degrees] C was equivalent to the buildup of interface traps in transistors irradiated at 27 [degrees] C and annealed for one week at 100 [degrees] C (standard rebound test). For the p-channel transistors, a one-to-one correlation was observed between the increase in interface-trap charge and the decrease in oxide-trapped charge during irradiation. This may imply a link between increased interface-trap buildup and the annealing of oxide-trapped charge in these devices. The observed data can be explained in terms of increased hydrogen ion transport rates to the Si/Si[O.sub.2] interface during elevated temperature irradiations. These results have implications on hardness assurance testing and potentially may be used to reduce costs associated with rebound qualification.

We have performed current-voltage, capacitance-voltage and electron-paramagnetic-resonance (EPR) characterization of silicon-on-insulator (SOI) samples, subjected to a wide variety of irradiation and anneal treatments. By comparing transport properties and interfacial reaction mechanisms, we provide evidence for an intrinsic difference in the response of mobile protons in these oxides, depending on whether they are generated by irradiation or by [H.sub.2] annealing. A radiation effects study of SOI buried oxides containing annealing induced mobile protons is presented to gain insight into the mechanisms behind these fundamental differences. Electrical characterization shows that, for these devices, the initial interface trap and mobile proton densities are largely unaffected by the irradiation. However, if the irradiation is carried out in the presence of positive bias applied to the top Si, the protons become trapped in shallow levels. These proton traps are activated by the irradiation and are located near the oxide/substrate interface. These results may lead to improved radiation hardness of buried oxides for nonvolatile memory and other applications.

A room Co-60 source was characterized using thermoluminescent dosimeters (TLDs) and pMOS RADFETs. Measurements were made over a range of dose rates between 0.8 and 100 mrad(Si)/s. Dose enhancement (DE) was measured using RADFETs with and without gold-flashed kovar lids. DE factors ranged from 1.05 to 2.35. A method was developed to predict dose enhancement as a function of position and test configuration. This method involves separation of direct and scattered gamma dose rate contributions.

Identifying aging effects that impact radiation hardness of microelectronics is becoming increasingly important as military weapon systems are kept in the stockpile for times beyond their originally intended use period. In this work, burn-in effects are used to demonstrate the potential impact of thermally-activated aging effects on integrated circuit radiation hardness. Static random access memories (SRAMs) from three different commercial technologies were irradiated with different pre-irradiation stress conditions. A reduction in the total dose functional failure level was observed for SRAMs from two of the technologies subjected to pre-irradiation elevated temperature stresses. This is the first time the burn-in effect has been shown to degrade the radiation-induced functional failure level of an IC. SRAM data also show no indication that the burn-in effect will saturate, at least for the conditions examined in this work. These data indicate that long-term aging can result in more device degradation than is accounted for by present hardness assurance test guidelines, potentially causing device and/or system failure during the aging period. While only a few technologies have been examined to date, we suspect other technologies may exhibit similar long-term aging effects. A technique for including aging effects within a hardness assurance test program is outlined.

A low-voltage, radiation-tolerant, nonvolatile field effect transistor (NVFET) memory involving proton motion in Si[O.sub.2] is illustrated in both bulk Si and silicon-on-insulator devices. We discuss a mechanism by which the protons are created in the oxide layer by a forming gas anneal. At low temperature (T < 250 [degrees] C), the [H.sup.+] is largely 'imprisoned' in the buried Si[O.sub.2] layer; i.e., the ions are sandwiched between the two encapsulating Si layers. The Si layers can be either c-Si or poly-Si, thus the technology is compatible with standard Si processing. The protons can be reliably and controllably drifted from one interface to another without any noticeable degradation in the signal past [10.sup.6] cycles. Under an unbiased condition, the net proton density is not significantly affected by radiation up to at least 100 kraal (Si[O.sub.2]). Last, we compare many of the properties of the NVFET to commercial flash nonvolatile memories.

A dual-dielectric pMOS dosimeter (RADFET) has been recently designed at Sandia. The RADFET consists of a thermally grown oxide and a CVD deposited nitride. With a negatively applied bias, holes generated in the Si[O.sub.2] transport to and are trapped at the Si[O.sub.2]/[Si.sub.3][N.sub.4] interface producing a measurable threshold-voltage shift. Because holes are trapped away from the Si/Si[O.sub.2] interface, hole neutralization by tunneling and interface-trap buildup are minimized resulting in little fade or annealing of the RADFET output response. RADFETs were irradiated at dose rates from 0.002 to 50 rad(Si)/s with biases from -5 to -20 V. RADFETs were also annealed for times up to [10.sup.7]s at temperatures up to 100 [degrees] C. Within experimental uncertainty, no difference in RADFET output response at a given bias was observed over the dose rate range examined and for 25 [degrees] C anneals. At an anneal temperature of 100 [degrees] C only a 20% decrease in RADFET output response was observed. These results show that Sandia's RADFETs exhibit little or no fade of their output characteristics and are ideal for low dose rate space applications.

We find that annealing oxides in a [H.sub.2] containing ambient creates positive charge in the dielectric of Si/Si[O.sub.2]/Si structures. The H-induced positive oxide charge is shown to be very different from-radiation-induced oxygen vacancy hole traps (E' centers) in Si[O.sub.2]. We find that three factors strongly influence the ability to create H-induced positive charge: temperature, hydrogen concentration in the ambient, and the density of hydrogen cracking centers. We suggest that over-coordinated O centers are responsible for this charge. The proposed over-coordinated oxygen centers may also account for the equivocal nature of several forms of positive charge that have escaped detection by electron paramagnetic resonance, such as the fixed oxide charge that forms during the thermal oxidation of Si.

We have performed thermally-stimulated-current (TSC) and capacitance-voltage measurements on 3701080 nm thermal, SIMOX, and bipolar-base oxides as functions of bias, dose rate, and temperature during irradiation. Base oxides built in a development version of Analog Devices' RF25 process show much more inter-face-trap buildup than XFCB oxides. Both net-oxide-trap and interface-trap charge densities for RF25 capacitors are enhanced significantly during low-dose-rate or high-temperature irradiation at 0 V over high-rate, 25 [degrees] C exposures. TSC measurements show the increase in net-oxide-trap charge density is due to a decrease in trapped electron density with decreasing dose rate or increasing irradiation temperature (at least to 125 [degrees] C), and not by increased trapped hole density. Similar enhancement of net-oxide-trap and interface-trap charge density with decreasing dose rate is found for soft thermal oxides irradiated at 0 V, but not 5 V. These results strongly suggest that space charge effects associated with holes metastably trapped in the bulk of the oxide can cause the enhanced bipolar gain degradation seen at low dose rates and/or high temperatures in many technologies. No enhanced radiation-induced charge trapping is observed for low-dose-rate or high-temperature, 0 V irradiation of SIMOX capacitors. Implications for hardness assurance tests are discussed.

The effects of pre-irradiation elevated-temperature bias stresses on the radiation hardness of field-oxide transistors have been investigated as a function of stress temperature, time, and bias. Both the stress temperature and time are found to have a significant impact on radiation-induced charge buildup in these transistors. Specifically, an increase in either the stress temperature or time causes a much larger negative shift (towards depletion) in the I-V characteristics of the n-channel field-oxide transistors. This increased shift in the transistor I-V characteristics with stress temperature and time suggests that the mechanisms responsible for the stress effects are thermally activated. An activation energy of [approximately]0.38 eV was measured. The stress bias was found to have no impact on radiation-induced charge buildup in these transistors. The observed stress temperature, time, and bias dependencies appears to be consistent with the diffusion of molecular hydrogen during a given stress period. These results have important implications for the development of hardness assurance test methods.

Transistors and ICs were irradiated with or without pre-irradiation elevated-temperature biased stresses (i.e., burn-in). These stresses lead to larger radiation-induced transistor threshold-voltage shifts and increases in IC static power supply leakage current (two orders of magnitude) in stressed ICs than for ICs not subjected to a stress. In addition, these stresses led to reduced degradation in timing parameters. The major cause of the differences is less radiation-induced interface-trap buildup for transistors subjected to an elevated-temperature biased stress. These results were observed for two distinctly different technologies and have significant implications on hardness assurance testing. One could significantly (1) overestimate degradation in timing parameters resulting in the rejection of acceptable ICs and increased system cost, or (2) underestimate the increase in static supply leakage current of ICs leading to system failure. These results suggest that radiation qualification testing must be performed on integrated circuits that have been subjected to all high-temperature biased stresses experienced in normal production flow or system use.

A wide range of advanced III-V components suitable for use in high-speed satellite communication systems were evaluated for displacement damage and single-event effects in high-energy, high-fluence proton environments. Transistors and integrated circuits (both digital and MMIC) were irradiated with protons at energies from 41 to 197 MeV and at fluences from [10.sup.10] to 2X[10.sup.14] protons/[cm.sup.2]. Large soft-error rates were measured for digital GaAs MESFET (3X[10.sup.-5] errors/bit-day) and heterojunction bipolar circuits ([10.sup.-5] errors/bit-day). No transient signals were detected from MMIC circuits. The largest degradation in transistor response caused by displacement damage was observed for 1.0-[[micro]meter] depletion- and enhancement-mode MESFET transistors. Shorter gate length MESFET transistors and HEMT transistors exhibited less displacement-induced damage. These results show that memory-intensive GaAs digital circuits may result in significant system degradation due to single-event upset in natural and man-made space environments. However, displacement damage effects should not be a limiting factor for fluence levels up to [10.sup.14] protons/[cm.sup.2] [equivalent to total doses in excess of 10 Mrad(GaAs)].

We show that enhanced hole-, electron-, interface-, and border-trap generation in irradiated Si/Si[O.sub.2]/Si systems that have received a high-temperature anneal during device fabrication is related either directly, or indirectly, to the presence of anneal-created oxygen vacancies. The high-temperature anneal results are shown to be relevant to understanding defect creation in zone-melt-recrystallized silicon on insulator materials. We observe the electron paramagnetic resonance (EPR) of trap-assisted hole transfer between two different oxygen vacancy-type defects (E [prime] [Delta] [approches] E [prime] [Gamma] precursor) in hole injected thermal Si[O.sub.2] films. Upon annealing the hole injected Si/Si[O.sub.2] structures at room temperature, the E [prime] [Delta] center transfers its hole to a previously neutral oxygen vacancy ([O.sub.3] [is equivalent to] Si-S [is equivalent to] [O.sub.3]) site forming an E [prime] [Gamma] center. This process, also monitored electrically, shows a concomitant increase in the border-trap density that mimics the growth kinetics of the transfer-activated E [prime] [Gamma] centers. This suggests that both effects are correlated and that some of the transfer-created E [prime] [Gamma] centers are the entities responsible for the border traps in these devices. One implication of these results is that delayed defect growth processes can occur via slow trap-assisted hole motion in Si[O.sub.2].