146 results on '"Schaekers M"'
Search Results
2. Low temperature chemical vapour synthesis of Cu3Ge thin films for interconnect applications
3. High- k dielectrics for future generation memory devices (Invited Paper)
4. Monitoring plasma nitridation of HfSiO x by corona charge measurements
5. Study of pulsed RF DPN process parameters for 65 nm node MOSFET gate dielectrics
6. Effect of the dielectric thickness and the metal deposition technique on the mobility for HfO2/TaN NMOS devices
7. Optimization of low temperature silicon nitride processes for improvement of device performance
8. Effect of Cl in Gate Oxidation
9. High-k Dielectrics and Metal Gates for Future Generation Memory Devices
10. Selective epitaxial p-SiGe Source-Drain Contacts: Low Contact Resistivity (1.5x10-9 ohm.cm2) by Optimizing Strain and Doping Concentration
11. Epitaxial Growth of (Si)GeSn Source/Drain Layers for Advanced Ge Gate All Around Devices
12. Round robin investigation of silicon oxide on silicon reference materials for ellipsometry
13. Impact of material/process interactions on the properties of a porous CVD-O 3 low-k dielectric film
14. Characterisation and integration feasibility of JSR’s low- k dielectric LKD-5109
15. A Simple H-Passivation Technique for High Performance Low Temperature Poly-Si TFTs
16. Characterization and Integration in Cu Damascene Structures of AURORA, an Inorganic Low-k Dielectric
17. Impact of gate oxide nitridation process on 1/ f noise in 0.18 μm CMOS
18. Very Low Temperature Epitaxy of Group-IV Semiconductors for Use in FinFET, Stacked Nanowires and Monolithic 3D Integration
19. Ge:B and GeSn:B Low Temperature Selective Epitaxial Growth Schemes for Source/Drain layers in Ge pMOS devices
20. The VO2 interface, the metal-insulator transition tunnel junction, and the metal-insulator transition switch On-Off resistance.
21. Integration of SrBi2Ta2O9 thin films for high density ferroelectric random access memory.
22. CD control using SiON BARL processing for sub-0.25 μm lithography
23. Integration of SrBi2Ta2O9 thin films for high density ferroelectric random access memory
24. Study of the Intrinsic Limitations of the Contact Resistance of Metal/Semiconductor Interfaces through Atomistic Simulations
25. Comprehensive study of Ga activation in Si, SiGe and Ge with 5 × 10−10 Ω·cm2 contact resistivity achieved on Ga doped Ge using nanosecond laser activation
26. Sub-10−9 Ω·cm2 contact resistivity on p-SiGe achieved by Ga doping and nanosecond laser activation
27. Ultralow resistive wrap around contact to scaled FinFET devices by using ALD-Ti contact metal
28. Heterostructure at CMOS source/drain: Contributor or alleviator to the high access resistance problem?
29. Ultralow-resistivity CMOS contact scheme with pre-contact amorphization plus Ti (germano-)silicidation
30. Beyond-Si materials and devices for more Moore and more than Moore applications
31. Process options to enable (sub-)1e-9 Ohm.cm2 contact resistivity on Si devices
32. 1.5×10−9 Ωcm2 Contact resistivity on highly doped Si:P using Ge pre-amorphization and Ti silicidation
33. Strained germanium quantum well p-FinFETs fabricated on 45nm Fin pitch using replacement channel, replacement metal gate and germanide-free local interconnect
34. Switching mechanism in two-terminal vanadium dioxide devices
35. Polycrystalline silicon as waveguide material for advanced photonic
36. Deposited silicon-on-insulator material technology for photonic integrated circuitry
37. Contact module at dense gate pitch technology challenges
38. Advanced cleaning strategies for ultraclean silicon surfaces
39. Direct physical evidence of mechanisms of leakage and equivalent oxide thickness reduction in metal-insulator-metal capacitors based on RuOx/TiOx/SrxTiyOz/TiN stacks
40. Impact of the Plasma Ambient and the Ruthenium Precursor on the Growth of Ruthenium Films by Plasma Enhanced Atomic Layer Deposition
41. Scalability of plasma enhanced atomic layer deposited ruthenium films for interconnect applications
42. (Invited) Plasma Enhanced Atomic Layer Deposited Ruthenium for MIMCAP Applications
43. Investigation of Switching Behavior of 2-terminal Devices on VO2
44. Advanced Capacitor Dielectrics: Towards 2x nm DRAM
45. Development of ALD HfZrO[sub x] with TDEAH/TDEAZ and H[sub 2]O
46. Sandwich stacks replacing SiO2 in standard bonded Si-on-Insulator (SOI) substrates to obtain a high-thermal conductivity HTC-SOI substrate
47. Plasma-enhanced chemical vapour deposition growth of Si nanowires with low melting point metal catalysts: an effective alternative to Au-mediated growth
48. Monitoring plasma nitridation of HfSiOx by corona charge measurements
49. Polycrystalline Si optimization for 45nm node Ni-FUSI gate
50. Plasma-nitrided silicon-rich oxide as an extension to ultrathin nitrided oxide gate dielectrics
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.