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We aim at the engineering applications of reservoir computing using hardware chaotic neural networks, including associative memory recall. The reservoir layer used in reservoir computing is networked and constructed using pulse‐type hardware chaos neuron models (P‐HCNMs). The structure of the reservoir layer is simple, which is advantageous for hardware implementation. By inducing chaos in the reservoir layer, it is possible to use the "chaotic edge" where the reservoir reaches its highest efficiency. It has also been reported that incorporating self‐correction within the reservoir layer increases the efficiency of the task. In this paper, we constructed a hardware small‐world neural network using a synaptic model with spike timing‐dependent synaptic plasticity (STDP) and a gap junction model. As a result, it is clarified that all cell body models with synaptic model connections show chaotic firing by simulation at the same time, and that the STDP model enables learning while keeping the chaotic phenomena. In addition, comparison with the firing of cell body models coupled only with synaptic models suggested that the gap junction model works significantly in inducing chaos in neural networks. [ABSTRACT FROM AUTHOR]

Recently, research has been actively pursued to implement a neuron, which is the basic unit for building neural networks, in hardware with engineering applications as the objective. Specifically, pulse-type hardware neuron models, which approximately replicate pulse signals, have been examined as the information transmission stage in the brain. However, a pulse-type hardware neuron model is a complex circuit and includes inductors. Consequently, there are few practical models. In this paper, we present the Λ-type neuron model, which is a pulse-type hardware neuron model built from only enhancement-mode MOSFETs (E-MOSFETs), which can be handled in a standard CMOS process, and capacitors, and is useful as a hardware neuron model intended for large-scale neural networks. First, we show that a Λ-type negative resistance circuit having a negative resistance that varies over time can be fabricated from E-MOSFETs, and explain its principle. Next, we show that this negative resistance circuit can be used to fabricate a Λ-type neuron model from E-MOSFETs, which can be handled in a standard CMOS process. © 2002 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 86(1): 18–25, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.10020 [ABSTRACT FROM AUTHOR]

SUMMARY: This paper presents the locomotion control of a microelectromechanical system (MEMS) microrobot. The MEMS microrobot demonstrates locomotion control by pulse‐type hardware neural networks (P‐HNN). P‐HNN generate oscillatory patterns of electrical activity like those of living organisms. The basic component of P‐HNN is a pulse‐type hardware neuron model (P‐HNM). The P‐HNM has the same basic features as biological neurons, such as the threshold, the refractory period, and spatiotemporal summation characteristics, and allows the generation of continuous action potentials. P‐HNN has been constructed with MOSFETs and can be integrated by CMOS technology. Like living organisms, P‐HNN has realized robot control without using software programs or A/D converters. The size of the microrobot fabricated by MEMS technology was 4 × 4 × 3.5 mm. The frame of the robot was made of a silicon wafer, equipped with rotary actuators, link mechanisms, and six legs. The MEMS microrobot emulated the locomotion method and the neural networks of an insect by rotary actuators, link mechanisms, and the P‐HNN. We show that the P‐HNN can control the forward and backward locomotion of the fabricated MEMS microrobot, and that it is possible to switch its direction by inputting an external trigger pulse. The locomotion speed was 19.5 mm/min and the step size was 1.3 mm. © 2013 Wiley Periodicals, Inc. Electr Eng Jpn, 186(3): 43–50, 2014; Published online in Wiley Online Library ( wileyonlinelibrary.com). DOI 10.1002/eej.22473 [ABSTRACT FROM AUTHOR]