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A kind of CMOS bandgap reference circuit with high order temperature compensation is introduced [1]. Compared to the traditional circuit, the bandgap reference proposed here has several advantages such as better temperature stability, smaller chip area, lower power consumption, self-power-on, and so on. Our design can be used in analog-to-digital or digital-to-analog converters, where high performance bandgap reference is required.

In this paper, we present an 8-bit 5 Gsample/s time-interleaved analog-to-digital converter (TI ADC). A 4-phase low jitter clock is designed to control four 1.25 Gsample/s sub-ADCs which is implemented using folding and interpolating architecture. Digital calibration is used to adjust the offset error and gain error of sub-ADCs. Meanwhile, serial peripheral interface (SPI) is adopted to adjust mismatch of gain and sample time between sub-ADCs. The whole TI ADC is designed using a 0.18m SiGe BiCMOS process. The whole ADC has a SNR of about 45 dB at the input frequency of 495 MHZ and an equivalent ENOB of 7.2 bits.