198 results on '"Rodriguez-Henriquez, Francisco"'
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2. Faulty isogenies: a new kind of leakage
3. Extending the GLS endomorphism to speed up GHS Weil descent using Magma
4. Post-Quantum Digital Signatures for Bitcoin
5. Stronger and Faster Side-Channel Protections for CSIDH
6. SwiftEC: Shallue-van de Woestijne Indifferentiable Function to Elliptic Curves : Faster Indifferentiable Hashing to Elliptic Curves
7. Parallel Isogeny Path Finding with Limited Memory
8. Verifiable Isogeny Walks: Towards an Isogeny-Based Postquantum VDF
9. LOVE a Pairing
10. On the Cost of Computing Isogenies Between Supersingular Elliptic Curves
11. How to (Pre-)Compute a Ladder : Improving the Performance of X25519 and X448
12. Constant-time hardware computation of elliptic curve scalar multiplication around the 128 bit security level
13. A GPU Parallel Implementation of the RSA Private Operation
14. Software Implementation of Koblitz Curves over Quadratic Fields
15. Computing Discrete Logarithms in Using Magma
16. Fast Point Multiplication Algorithms for Binary Elliptic Curves with and without Precomputation
17. Weakness of for Discrete Logarithm Cryptography
18. Lambda Coordinates for Binary Elliptic Curves
19. NEON Implementation of an Attribute-Based Encryption Scheme
20. Implementing Pairings at the 192-Bit Security Level
21. Faster Implementation of Scalar Multiplication on Koblitz Curves
22. Faster Hashing to
23. Parallelizing the Weil and Tate Pairings
24. Software Implementation of Binary Elliptic Curves: Impact of the Carry-Less Multiplier on Scalar Multiplication
25. High-Speed Software Implementation of the Optimal Ate Pairing over Barreto–Naehrig Curves
26. On Some Weaknesses in the Disk Encryption Schemes EME and EME2
27. Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves
28. Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers
29. A Comparison between Hardware Accelerators for the Modified Tate Pairing over
30. Final Exponentiation
31. A Parallel Version of the Itoh-Tsujii Multiplicative Inversion Algorithm
32. Efficient Implementations of Some Tweakable Enciphering Schemes in Reconfigurable Hardware
33. An FPGA Implementation of CCM Mode Using AES
34. Fuzzeval: A Fuzzy Controller-Based Approach in Adaptive Learning for Backgammon Game
35. Finding Optimal Addition Chains Using a Genetic Algorithm Approach
36. On the Optimal Computation of Finite Field Exponentiation
37. Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
38. Parallel Strategies for SIDH: Toward Computing SIDH Twice as Fast.
39. Parallel strategies for SIDH: Towards computing SIDH twice as fast
40. Low-complexity bit-parallel square root computation over GF([2.sup.m]) for all trinomials
41. Parallel multipliers based on special irreducible pentanomials
42. Implementation of RSA Signatures on GPU and CPU Architectures
43. A Faster Software Implementation of the Supersingular Isogeny Diffie-Hellman Key Exchange Protocol
44. A reconfigurable processor for high speed point multiplication in elliptic curves
45. On Instantiating Pairing-Based Protocols with Elliptic Curves of Embedding Degree One
46. Introduction
47. Security vulnerabilities of the Mexican digital invoices by internet
48. Software Implementation of an Attribute-Based Encryption Scheme
49. Square Root Computation over Even Extension Fields
50. Cryptographic Algorithms on Reconfigurable Hardware Introduction
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