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This article presents a novel waveform engineered sequential load modulated balanced amplifier (W-SLMBA) that uses a continuous Class-F⁻¹ control amplifier (CA) to manipulate the impedance trajectory of the balanced amplifier (BA). It is demonstrated that the use of the continuous Class-F⁻¹ CA can trigger a unique impedance load modulation mechanism by which the fundamental impedance of the BA is shaped by the varying second-harmonic load reactance of the CA. Theoretical derivations reveal that this special load modulation yields extended design space for the LMBA, in which high efficiency can be achieved over wide bandwidth and output power back-off (OPBO). A prototype operating from 1.80 to 2.75 GHz is designed following the proposed theory. The implemented LMBA achieves a measured drain efficiency (DE) of 60.2%-68.3% at saturation and 51.8%-69.0% at 8-dB OPBO. When tested with a 100-MHz long-term evolution (LTE) signal having peak-to-average power ratio (PAPR) of 8 dB, the proposed LMBA achieves 50.2%-59.1% average DE and better than -45.1-dBc adjacent channel power ratio (ACPR) across the target bandwidth after digital predistortion (DPD).

A comprehensive time-domain modeling and a generalized design methodology for input and output waveform engineered Class-F power amplifiers (PAs) are presented in this article. A closed-form relationship between input nonlinearity and second harmonic source impedance ( $Z_{\mathrm {2S}}$ ) termination is presented from which efficiency and output power performance are predicted for Class-F PAs. The maximum, minimum, and safe $Z_{\mathrm {2S}}$ design space for a Class-F PA are identified. Moreover, the derived design equations show that the typical fundamental load of a Class-F PA operation must be re-engineered in the presence of input nonlinearity in order to achieve optimum efficiency performance. The theoretical analyses are first validated with pulsed vector load–pull (VLP) measurements with a gallium nitride (GaN) 2 mm device. Then, high-power (210 W) GaN 24-mm devices with in-package $Z_{\mathrm {2S}}$ terminations are implemented. Measurement results with the new source and load design space show efficiency improvement of 4.4% compared to the nominal Class-F PA.

A comprehensive analysis is presented for investigating the effects of input nonlinearity on performance and broadband design of continuous-mode class-F power amplifiers (PAs). New time-domain waveforms are derived considering input and output harmonic terminations for continuous-mode class-F operation. The derived design equations show that the typical fundamental load design space of a continuous class-F PA must be reengineered in the presence of second-harmonic input nonlinearity to new design space in order to achieve optimum class-F PA performance versus varying second-harmonic load impedance. For the practical validation, the impacts of input nonlinearity on the performance of continuous-mode class-F PAs are first confirmed with pulsed vector load–pull (VLP) measurements on a low-power GaN 2-mm device. Second, a broadband high-power GaN 24-mm part is designed following the proposed theory with in-package input second-harmonic terminations targeting 1.75–2.3-GHz frequency band for the sub-6 GHz 5G high-power applications. Efficiency higher than 65% with peak power more than 53.2 dBm was maintained over the target frequency band, with excellent flatness. Third, a Doherty PA is implemented based on the designed GaN 24-mm part to evaluate the broadband performance with modulated stimuli. Using a multicarrier signal having an instantaneous bandwidth of 395 MHz, the average drain efficiency of the Doherty PA at 8-dB output back-off is higher than 44%, and the linearized adjacent channel power ratio (ACPR) is better than −52 dBc.

An in-depth analysis of the continuous inverse Class F power amplifier (PA) accounting for nonlinear input and output active device properties is presented. The analyses show possible ways of exploiting input nonlinearity to improve and maintain PA performance in a broadband operation and propose a flexible source second-harmonic design space which reduces the input matching network (MN) design complexities. Such exploitation of input nonlinearity can also alleviate performance degradation due to dynamic knee behavior of a practical field-effect transistor (FET) in continuous inverse Class F PA operation. The analyses are validated with vector load–pull (VLP) measurements and utilized to implement a broadband PA design. High-drain efficiency (DE) over 75% and output power more than 38 dBm are achieved over 0.8–1.4 GHz at constant 3-dB gain compression.

This paper investigates the source and implication of efficiency minima that is typically observed during the second-harmonic load–pull of transistor amplifiers. The study starts with the theoretical derivation of time-domain voltage and current waveforms as a function of conduction angle ( $\alpha$ ) at the second-harmonic efficiency minima, where the output power and drain efficiency (DE) are at minimum. Thereafter, this paper unfolds a systematic re-engineering approach that is developed to recover the performance degradation and to exploit the region of efficiency minima in favor of design and implementation of high-efficiency inverse class-F power amplifiers (PAs). Interestingly, the inferences drawn from the in-depth analysis are shown to provide a simplified first-pass design approach that guarantees inverse class-F PA operation without an a priori knowledge of device parasitic elements. Theoretical postulations and simulation results are experimentally validated using an on-wafer active harmonic load–pull and a prototype design using 1.95-mm NXP gallium nitride die at a frequency of 2.6 GHz. The designed PA delivers an output power of 40 dBm with DE of 76% and gain of 12 dB at 3-dB gain compression. The measurement results confirm the theoretical framework reported in this paper.

The impact of input nonlinearity due to the nonlinear C GS - $V$ GS profile on load harmonic tuned power amplifier (PA) performance is qualitatively discussed. It is experimentally validated by pulsed vector load pull measurements that both Class B and Class F PA operation are quite sensitive to the source second harmonic (Z 2S ) termination with an efficiency delta of ∼40%. In contrast, Class F−l PA shows relatively robust performance with an efficiency delta of ∼10% versus Z 2S terminations. Thus, we identify the ‘good’ and ‘bad’ design space of Z 2S terminations on the Smith chart for load harmonic tuned PA classes. In addition, this paper identifies a design space continuum for Z 2S terminations other than a short for Class F−l PA which results in consistent efficiency, output power, and improved linearity.

This paper presents an in-depth, systematic study of the impact of input and output harmonics in the design of high-efficiency power amplifiers (PAs). The study evaluates the performance of harmonically tuned amplifiers, tackling concurrently both input and output harmonics. The proposed theory starts with deriving an altered input voltage waveform under the impact of input nonlinearity. Intrinsic drain voltage and drain current components are formulated as a function of the conduction angle $\alpha $ considering both source and load terminations. Output power and drain efficiency are then computed as a function of input nonlinearity, $\alpha $ , and output loading conditions. The derived formulations allow to investigate the design sensitivity to input nonlinearity and its impact on fundamental design space. The impact of source harmonics is evaluated using harmonic source pull under different output loading conditions. Thereafter, PA design and implementation has been carried out using NXP 1.95 mm die to confirm the distinctive behavior of class GF and GF−1 amplifiers with respect to the input harmonic terminations. For practical validation, four different design cases with different second harmonic source impedances are investigated. At 2.6 GHz, drain efficiencies ranging between 76% and 83% were exhibited depending on the source and load harmonic tuning for each design case. Measurement results confirm the theoretical findings reported in this paper.

This paper derives a novel continuum of Doherty power amplifier (PA) solutions with enhanced load modulation over an extended RF bandwidth. It is analytically shown that Doherty PAs with efficiency peaks at maximum power and at an arbitrary back-off level can be achieved with numerous configurations of output power combiner. Generalized governing equations for carrier and peaking transistor current ratios, voltage profiles, and biasing conditions are derived in order to assess the performance of any Doherty amplifier configuration. The generalization demonstrates the impact of the selection of the output combiner on PA performance and highlights the tradeoffs between the different solutions. A wideband Doherty PA was designed based on the proposed methodology and implemented using packaged gallium nitride transistors. Over the frequency band of 0.55–1.10 GHz, the Doherty PA exhibited drain efficiency in excess of 40% and 56% at 6-dB output power back-off (OPBO) and peak power, respectively. The Doherty PA was successfully linearized when driven with modulated stimulus and achieved average drain efficiency above 40% at 7.1-dB OPBO.

This letter investigates the impact of open second-harmonic impedance on the static amplitude-to-amplitude modulation (AM/AM) characteristic of class-F−1 power amplifiers (PAs). The phenomenon of double gain compression in harmonically tuned PAs is analyzed for the first time. The study starts with presenting a theoretical postulation explaining the occurrence of inflection points in AM/AM profiles of class-F−1 PAs. Thereafter, a simplified mathematical model providing closed-form expressions for predicting the locations of output power levels of the first and second AM/AM inflection points is presented. For practical validation, an active load–pull system is used to synthesize class-F−1 load conditions using a 0.7-mm NXP GaN die at a frequency of 2.6 GHz. The gain curve profile varies quite significantly as a function of second harmonic load reactance and it has been measured to capture the AM/AM inflection phenomenon at low power levels. Under class-F−1 harmonic loading conditions at 28 and 48 V, the active load–pull measurements demonstrate the phenomenon of AM/AM inflection and agree well with the mathematical analysis presented in this letter.

This letter investigates the source of performance degradation and efficiency null that is traditionally observed during second-harmonic load pull of active power transistors. A theory that explains the performance degradation is presented, resulting in a simplified closed-form equation that predicts the location of performance null for different device peripheries and/or design frequencies. Thereafter, the intrinsic drain waveforms for null and maximum efficiency are analyzed to study potential causes for efficiency degradation. The theory is validated using active load-pull measurements of laterally diffused metal–oxide–semiconductor and gallium nitride active devices for different peripheries (0.5–4.8 mm) at various frequencies of operation (2, 2.6, and 3.5 GHz).

Inverse Class-F (Class F−1) power amplifiers (PAs) are widely known to deliver excellent performance at saturation. Due to this, Class F−1 PAs are not recommended for applications where PA operation is required to be backed-off from saturation. This paper explores optimizing Class F−1 PA performance and maintaining the performance over a high range of gain compression levels. A simple model of the Class F−1 amplifier is proposed to approximate its harmonic-dependent behavior as seen at the internal reference plane. A load-pull based experimental approach is then presented, according to which input second-harmonic terminations are tuned, while maintaining quasi-ideal inverse Class F output matching conditions. The device under test used in the experiment is a 0.7 mm Gallium Nitride (GaN) die from NXP at a frequency of 2.6 GHz. Measured results provide significant insight into the impact of input harmonic manipulation on the amplitude-to-amplitude modulation (AM/AM) profile. A design space for second harmonic input impedance was found to provide relatively flatter AM/AM response of the Class F−1 PA yielding significantly improved RF performance at the 3-dB compression point (P3dB) compared to the classical Class F−1 PA with no second harmonic manipulation at the input.

Over the years, different high efficiency power amplifier (PA) design techniques have been proposed and implemented which eliminate input non-linearity considering its negative impact on PA output power and efficiency. This work rather exploits input non-linearity to improve PA efficiency. A generic analysis of a Class B PA under input non-linearity is presented opening the scope of input second harmonic manipulation to improve PA performances. This renders extended and new design space of second harmonic source termination to high efficiency PA design. Theoretical analyses are well supported with load-pull measurement results of a 0.7 mm and a 24 mm GaN devices where about 4.5% drain efficiency improvement compared to conventional Class B PA is observed.

This paper introduces the Class O2 power amplifier (PA) with high power-density and drain efficiency. A new waveform engineering-based design approach is proposed to realize a reliable high-efficiency PA operation while tuning both second and third harmonic impedances to open-circuit termination. The proposed theory derives the intrinsic current and voltage waveforms as a function of input second-harmonic tuning which is adopted to enable the realization of reliable Class O2 PA operation. A multi-harmonic vector load-pull system is used for the practical validation that is carried out using a 10-W gallium nitride (GaN) transistor. On load-pull, the Class O2 mode demonstrates a drain efficiency of 87% at an output power of 39.8 dBm with a gain of 10 dB at a frequency of 1.0 GHz.

Efficiency enhancement techniques for high-power amplification systems are now mature technologies, with Doherty power amplifiers (PAs) being widely used in field-deployed wireless base stations. A typical Doherty PA consists of two parallel amplifiers (a carrier amplifier, biased in class-AB, and a peaking amplifier, biased in class-C), an input analog splitter, and a nonisolated output power combiner. The operation of the Doherty PA is based on an active load modulation mechanism, which allows the carrier and peaking amplifiers to operate into optimal load-impedance trajectories that vary according to the amplitude of the input signal. This, in principle, results in increasing the average efficiency of the Doherty PA without compromising its linearity.

Broadband and high efficiency operation of power amplifiers (PAs) are highly desirable for smart transmitting radio frequency (RF) front-ends. Among different techniques, continuous mode harmonic tuned PAs offer attractive solution because of their methodological design procedures. However, the theory of such continuous mode PAs assumes constant knee voltage operation which varies over operating drain current in a real device. This work examines the performance of continuous mode inverse class F PAs considering variable knee voltage which predicts PA performance more accurately of a real device. Analysis shows about 7% output power and efficiency drop from ideal value which is validated with load-pull measurements.

This paper presents the impact of input non-linearity and its dependence to output loading conditions in the design of Gallium Nitride (GaN) based Power Amplifiers (PAs). The drain efficiency variation due to the input non-linearity for any arbitrary second harmonic loading condition is presented. The theory presents generalized current waveform equations as a function of conduction angle $\pmb{(\alpha)}$ and input harmonic non-linearity $(\gamma_{2})$ . Thereafter, to quantify the impact of source harmonics, a systematic methodology to evaluate the efficiency degradation is proposed. For practical validation, the active load pull (ALP) experiments are carried out using a 0.7 mm GaN die by NXP at 2.6 GHz. The drain efficiency variation as a function of second harmonic load reactance has been measured and reported at P3dB gain compression. While, class B, and class F shows 5–6% drain efficiency variation to second harmonic source pull, class $\mathbf{F}^{-1}$ , and class $\hat{\mathbf{J}}/\hat{\mathbf{J}}^{\ast}$ shows immunity to the input non-linearity with only 1–2 % drain efficiency variation.

This paper introduces a new architecture of frequency-agile Doherty power amplifier (PA)-based RF front-end. This architecture incorporates a baseband equalizer that is implemented using finite-impulse-response (FIR) digital filters to improve the performance of Doherty PAs when driven with large bandwidth and multiband wireless radios. Depending on the center frequency and bandwidth of the input signal, the FIR filters of the proposed equalizer are synthesized to compensate for the nonideal frequency behavior of the RF building blocks of the Doherty PA. It is shown that the proposed architecture enables the Doherty PA to operate with significantly improved power efficiency and linearity performance beyond its nominal frequency of design, which is suitable for multistandard applications. As a matter of fact, when driven with a 140-MHz bandwidth long-term evolution (LTE) signal centered around 2.30 GHz, the average efficiency of a 2.14-GHz Doherty PA prototype with the proposed digital baseband equalizer is enhanced from 33.5% to 44.7%. Moreover, its linearity performance in terms of adjacent channel leakage ratio (ACLR) is improved from $-$ 21 to $-\hbox{26 dB}$ . In addition, when operated in concurrent dual-band mode with two 20-MHz bandwidth LTE signals centered at 1.96 and 2.34 GHz, the proposed Doherty PA enabled a reduction in dc power consumption by nearly 15%. Furthermore, it is demonstrated that the integration of the proposed baseband equalizer does not compromise the linearizability of the Doherty PA. To the best of the authors’ knowledge, this is the first demonstration of the use of digital equalization for performance enhancement of RF Doherty PAs.

A broadband Class-J power amplifier (PA) with dynamic load modulation (DLM) is presented. It is theoretically shown that a PA with judicious variation of the load resistance and a purely reactive load modulation can maintain 70% drain efficiency over 73% fractional bandwidth and 8.5 dB dynamic range. The theory is verified by a demonstrator PA based on a gallium nitride (GaN) device and a varactor as the tuneable element. The load modulation shows good results from 1.7 GHz to 2.3 GHz and up to 50% of power added efficiency (PAE) is obtained. It is shown that the average PAE for a modulated signal with 7 dB peak-to-average ratio is improved by 15%.

This letter generalizes the theory of continuous class-F harmonic tuned power amplifiers (PAs) to model their operation for gate bias voltages above the pinch-off point (i.e., class-AB bias conditions). The proposed theory starts with deriving intrinsic drain current and voltage waveforms for continuous class-F harmonic tuned PA biased above pinch-off and then finding the resulting design space. The new formations resulted in shifted fundamental impedance space along with expanded second harmonic impedance space as the conduction angle, $\alpha$ , is swept between 180 and 360 $^{\circ}$ . Moreover, under class-F harmonic tuned termination, it is found that the drive power required at the input of the device is also dependent on bias conditions. For experimental validation, the proposed approach is adopted to implement a broadband PA using a 10 W gallium—nitride (GaN) transistor. Under class-AB bias conditions, the implemented PA shows more than 70% power added efficiency, 40 dBm output power, and 15 dB gain at frequencies from 550 to 950 MHz.

The paper extends the concept of waveform shaping for back-off applications which can be applied to realize power amplification sub-blocks in load modulation based power amplifiers. The proposed theory starts with deriving the intrinsic current and voltage waveforms as a function of output power back-off factor. Thereafter, a design methodology is proposed to optimize the performance of power amplifier for back-off requirements within a limit of 3 dB gain compression. For experimental validation, the implementation is carried out using a 1.95 mm gallium nitride (GaN) die. The single-ended PA is designed to operate as a carrier PA in a 35 dBm average asymmetric Doherty configuration (44 dBm peak power). The PA exhibits a drain efficiency of 78% at an average output power of 35 dBm at a frequency of 2.6 GHz.

This paper reports an envelope tracking (ET) transmitter architecture for multi-band/widely-spaced carrier signals. Due to the bandwidth limitations of the envelope modulator, the dynamic supply voltage is controlled by combining the low frequency envelopes of the multi-inputs rather than the true composite envelope of the input signals. The ET transmitter is tested for dual-band and tri-band power amplifiers (PAs) operating in concurrent mode using various bandwidth carrier aggregated long term evolution (LTE) signals. The transmitter is linearized using a phase-aligned Volterra digital predistortion that considers the inter-modulation distortion (IMD) products around the carrier frequencies as well as the third-order IMD products in the tri-band case. Experimental results are shown to validate the proposed techniques for linearization and efficiency enhancement of the multi-band ET transmitter and compared to the case of fixed supply biasing of the PA.

This paper proposes a new method for extending the bandwidth of Doherty power amplifiers (PAs) in the digital domain. The bandwidth enhancement is achieved through a frequency-selective pre-compensation mechanism that is derived to prevent the efficiency degradation that naturally occurs as the frequency of operation deviates from the center frequency. A methodical analysis of the frequency response of the conventional Doherty PA and that of the proposed Doherty PA is carried out to point out the limitations of the former and demonstrate the capability of the latter in recovering the bandwidth. Over the frequency range spanning from 1.96 to 2.46 GHz, the measured drain efficiency at 6-7-dB output power back-off is higher than 40% for the proposed Doherty PA. Such efficiency performance is achievable only from 2.04 to 2.22 GHz using the conventional Doherty PA. Hence, the bandwidth is enhanced from 180 to 500 MHz, which corresponds to an increase by a factor of 2.8 (i.e., almost triple). By applying the proposed methodology, a Doherty PA that is originally designed at the center frequency of 2.14 GHz for downlink wideband code division multiple access became operative at 1.98-GHz uplink wideband code division multiple access (UL-WCDMA), 2.22-GHz long-term evolution (LTE), and 2.34-GHz worldwide interoperability for microwave access (WiMAX) bands. The average drain efficiencies for UL-WCDMA, LTE, and WiMAX applications, were 40.1%, 44.2%, and 41.4%, respectively, using the proposed Doherty PA, and 37%, 37.3%, and 35.2%, respectively, using the conventional Doherty PA.

In this paper, a digital Doherty power amplifier (PA) with improved efficiency performance over a wide power range is proposed. The efficiency enhancement is achieved by using a digitally controlled dynamic input power distribution scheme implemented to improve the active load modulation mechanism and to minimize the drive power waste into the peaking branch at backed-off power levels. Furthermore, the proposed distribution scheme causes the premature saturation of the carrier amplifier of the proposed Doherty PA and results in an extended range of high back-off efficiency. A comprehensive study of the operational principle of the proposed efficiency-extended digital Doherty PA is provided to demonstrate its merits and to enlighten its operation. In particular, the current and power profiles of the proposed digital Doherty PA are exposed and its efficiency characteristics analyzed. For experimental validation, the proposed Doherty PA is implemented within the dual-input digitally driven architecture based on a 10-W gallium-nitride transistor. Using a one-carrier Worldwide Interoperability for Microwave Access signal with a 9-dB peak-to-average power ratio and 10-MHz bandwidth, the digitally linearized efficiency-extended Doherty PA exhibited an excellent drain efficiency of 50% along with - 38 dB of relative constellation error. The efficiency enhancement is 7% in comparison to a conventional fully analog Doherty PA.

In this paper, the novel architecture of a dual-input and digitally driven Doherty amplifier is proposed with the aim of improving the performance of gallium-nitride (GaN) Doherty transmitters. In this work, the power efficiency is enhanced by using digital adaptive phase alignment to compensate for performance degradation due to bias and power-dependant phase misalignment between the carrier and peaking branches. For experimental validation, the proposed dual-input digital Doherty power amplifier (PA) was implemented using a 10-W GaN transistor. Measurement results demonstrate that the dual-input Doherty prototype exhibited a power-added efficiency (PAE) higher than 50% over an 8-dB output power back-off (OPBO) range. In comparison with the conventional fully analog Doherty PA, this represents a 10% improvement in PAE over the same OPBO range. Using a one-carrier Worldwide Interoperability for Microwave Access signal with a 7-dB peak-to-average power ratio, the dual-input Doherty PA, with digital adaptive phase alignment applied at the input of its peaking path, achieved a PAE of 57% at an average output power of 37.8 dBm, along with a - 22-dBc adjacent channel power ratio (ACPR). This corresponds to an improvement of 7% in PAE and 1 dB in average output power for the same ACPR level in comparison with a conventional fully analog Doherty PA.

This paper discusses a methodology for design of broadband power amplifiers (PA's). In comparison to conventional class-F and inverse class-F modes, the continuous mode provides wider design space for the realization of broadband efficiency PAs through the proper termination of fundamental, second and third harmonic impedances. This manuscript presents an approach based on in-band mode transfer between continuous inverse class-F and continuous class-F to allow for the realization of high efficiency PAs with upto one octave bandwidth. The validation of this mode transfer concept is performed using a 10-W Gallium Nitride (GaN) device. The PA, which was designed in Advanced Design Systems, exhibited a drain efficiency of greater than 60%, a power gain higher than 13 dB, and an output power of more than 10W over the frequency band ranging from 460 to 920 MHz, which corresponds to one octave bandwidth or 67% of fractional bandwidth.

This paper discusses the design of different broadband continuous mode power amplifiers (PAs) using waveform engineering. The continuous mode provides wider design space for the realization of broadband high efficiency PAs by proper tuning of fundamental, second, third and fourth harmonic impedances. This work discusses in detail the process of waveform synthesis for class-J, continuous class-F and continuous inverse class-F PAs, which are the most popular continuous mode classes. The validation of our analysis is performed using a 10-Watt Gallium Nitride (GaN) device from Cree Inc. Three different PAs are implemented in Advanced Design Systems (ADS). These PAs are operated in Class-J, continuous class-F and continuous inverse class-F, respectively. Distinctive performance in terms of drain efficiency, output power and transducer gain over wide frequency band is exhibited. The operational class of each PA under study is verified depending on the shaping of voltage and current waveforms that are de-embedded at current generator plane of the packaged device.

This paper reports a dual band predistortion lin­earization technique for an envelope modulator based transmitter operated in concurrent multi-band, multi-standard mode driven by 20 MHz bandwidth LTE and 4 carrier MHz bandwidth WCDMA signals. To reduce the speed of the composite envelope path, a bandwidth reduced combined envelope signal is used for the dynamic supply of the dual-band PA. Measurement results using the dual-band linearization technique show an increase of over 10 dB in ACPR and 15% in average operating efficiency. Index Terms-digital predistortion, dual-band linearization, envelope tracking power amplifier, Volterra series. I. INTRODUCTION The efficiency of radiofrequency (RF) power amplifiers (PAs) is a very important issue in wireless communication systems, mainly when they are employed in mobile devices. In this case, higher efficiency means longer battery lifetime which translates directly into user comfort. For non-portable appli­cations (base station applications), efficiency is also important as heat dissipation is often an issue ,since it increases the operational costs of the cooling circuits. Therefore, in order to bolster low efficiency in the back-off region, various efficiency boosting techniques have been considered over time, where the most promising can be categorized into two groups. The first consists of improving the efficiency of amplifier architectures through load modulation techniques, such as Doherty PAs [1]. The second is using supply voltage modulated PAs that adjust according to the envelope of the RF signal, also known as envelope tracking (ET) [2]. These approaches have shown good capabilities in improving the PA efficiency and linearity when used in conjunction with linearization techniques. Digital predistortion (DPD) is one of the most commonly used linearization techniques. Recent and future wireless stan­dards call for multi-band wireless transceivers, with the aim of using multiple bands in concurrent mode to enhance data throughput. The operation of such multi-band transmitters has created new problems, which can be expressed through two performance metrics: efficiency and linearity. The linearization of these multi-band systems has been addressed recently [3], [4]. However, the results have been used for either a fixed voltage supplied to the PA, or operation in a single frequency band for multiple-input multiple-output (MIMO) ET transmitter architectures [5]. Therefore, in this paper a novel envelope tracking trans­mitter for concurrent dual-band operation is proposed. By adapting the power supply voltage dynamically according to the combined envelope of the two input signals, the dual-band PA will always approach higher efficiency compared with a fixed voltage supply, while the digital predistortion algorithm will compensate for the nonlinear effects caused by the PA. II.

This paper reports a Doherty power amplifier (PA) with significantly improved efficiency over large output power range. The efficiency enhancement is accomplished by associating digital adaptive power distribution and dynamic phase alignment mechanisms, which are implemented to prevent the efficiency degradation due to the problems of input drive waste at back-off, power-dependent phase misalignment between carrier and peaking branches, and impaired load modulation behavior. The measured average efficiency of the proposed Doherty PA is 53% compared to 45% for a standard Doherty PA.

To deal with the continuously increasing number of wireless communications subscribers and the growing quest for higher data rates, modern wireless communication standards (third generation and beyond) employ spectrum efficient modulation and access techniques, such as quadratic amplitude modulation (QAM) and orthogonal frequency division multiplexing (OFDM), etc. Although these techniques permit an efficient management of the overcrowded radio frequency (RF) spectrum, they also result in creating highly varying envelope signals that are characterized with high peak-to-average power ratio (PAPR). To avoid signal clipping and distortion of transmitted information, the power amplifier (PA) of wireless transmitter operates at large back-off from its saturation power level where its power efficiency drops drastically.

The present work proposes a digital Doherty power amplifier (PA) with improved efficiency performance. The efficiency enhancement is achieved by using a digital adaptive phase alignment mechanism that is implemented to address the problem of power-dependent phase imbalance between the carrier and peaking cells of gallium-nitride (GaN) Doherty PAs following the turn-on of the peaking cell. An average efficiency of 57% has been measured using a one-carrier Worldwide Interoperability for Microwave Access (WiMAX) signal with a peak-to-average power ratio of 7 dB. This corresponds to an improvement of 7% in average efficiency with no linearity degradation compared to a conventional single-input fully analog Doherty PA.

Location Determination in an indoor environment is a challenge that faces the wireless industry. The concept of indoor geolocation was established in order to provide the user's location inside buildings during an emergency where GNSS services are not effective. Keeping public safety in mind, it is not only important to estimate the position, but also to provide a high level of reliability. The paper presents practical results and issues related to the accuracy of an indoor geolocation system which uses a WCDMA signal at a 2.45 GHz carrier frequency. The experiment employs a hybrid TDOA/RSS algorithm and a TDOA only algorithm. Practical results indicate that the performance is improved by using hybrid TDOA/RSS algorithm as compared to TDOA alone.

In this study, a systematic design methodology is proposed to optimise the operation of Doherty power amplifiers (PAs). The proposed approach makes use of two sets of load-pull data to enhance the performance of Doherty PAs at low- and high-power-drive levels. The first load-pull, which is performed on the device operating at saturation, permits one to maximise the performance at a high-power region. The second load-pull, which is performed at the power level associated with the turn-on of the peaking amplifier, aims to boost the performance at back-off. To assess its effectiveness, the proposed methodology is applied to design three Doherty PAs sought for power efficiency, linearity and gain, respectively. Around the Doherty turn-on point, these circuits achieved up to 9% efficiency improvement, up to 10 dB inter-modulation reduction and up to 2 dB gain improvement, respectively. For experimental validation, a gallium-nitride (GaN)-based Doherty PA prototype sought for efficiency was implemented. The fabricated Doherty PA demonstrated a power-added efficiency (PAE) higher than 40% over an output power back-off (OPBO) range of 8 dB, with two peak PAE points of 52 and 62% located at 6.8 dB OPBO and at saturation, respectively.