1. A CMOS 65nm 120 dB Stacked A/D Converters receiver for long wavelength radio astronomy observations
- Author
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Baptiste Cecconi, Herve Petit, Reda Mohellebi, Milan Maksimovic, M. Dekkali, Chadi Jabbour, Patrick Loumeau, Laboratoire Traitement et Communication de l'Information (LTCI), Télécom ParisTech-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Laboratoire d'études spatiales et d'instrumentation en astrophysique (LESIA), Université Pierre et Marie Curie - Paris 6 (UPMC)-Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université Paris Diderot - Paris 7 (UPD7)-Centre National de la Recherche Scientifique (CNRS), Circuits et Systèmes de Communication (C2S), Institut Mines-Télécom [Paris] (IMT)-Télécom Paris-Institut Mines-Télécom [Paris] (IMT)-Télécom Paris, Département Communications & Electronique (COMELEC), Télécom ParisTech, and HAL, TelecomParis
- Subjects
Engineering ,010504 meteorology & atmospheric sciences ,business.industry ,Dynamic range ,Amplifier ,[SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics ,020208 electrical & electronic engineering ,Bandwidth (signal processing) ,Electrical engineering ,02 engineering and technology ,Converters ,01 natural sciences ,Capacitance ,[SPI.TRON] Engineering Sciences [physics]/Electronics ,[SPI.TRON]Engineering Sciences [physics]/Electronics ,Long wavelength ,Radio receiver - A/D converters - high dynamic range - Digital correction ,CMOS ,0202 electrical engineering, electronic engineering, information engineering ,Electronic engineering ,[SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics ,business ,ComputingMilieux_MISCELLANEOUS ,0105 earth and related environmental sciences ,Radio astronomy - Abstract
This paper presents a 120 dB Stacked analog to digital (A/D) converter dedicated for radio astronomy. The design of the chain of cascaded amplifiers preceding the A/D converters was performed in a 1.2 V 65 nm CMOS process. Simulation results showed that the designed chain of three cascaded amplifiers has an overall gain of 90 dB (30 dB each) over 100 MHz of bandwidth. The paper proposes also a calibration technique that copes with the phase and gain mismatches between channels allowing thereby to reach the minimum required SNR of 30 dB over all the input range.
- Published
- 2016