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This work had successfully employed commercially purchased Aloe Vera gel as the active layer on indium tin oxide (ITO) glass substrate. Different heating temperatures were studied on the Aloe Vera/ITO samples. Results showed the existence of OH and C-H groups in the samples using Fourier transform infrared spectroscopy. Typical thickness (246·8 nm) of Aloe Vera was determined using field emission scanning electron microscopy cross-sectional studies. Direct band gap ( Eg) energies (3·88-4·00 eV) were calculated using Tauc plot by extracting data from the UV-Vis absorption spectra while dielectric permittivity values were measured using impedance analyser. Current-gate voltage ( I-V) characteristics and time dependence I-V characteristics of the Al/Aloe Vera/ITO device deduced that the device was showing a write-once-read-many (WORM) memory response and thus was potential to serve as the WORM memory device. [ABSTRACT FROM AUTHOR]

In this work, systematic investigation was performed to study the effects of post-deposition annealing time (15, 30 and 45 minutes) at 1000°C in oxygen ambient on electrical characteristics of Y2O3 gate deposited on Si substrate using radio frequency magnetron sputtering. Capacitance-voltage characteristics of the investigated samples deduced the presence of positive-charged traps through the attainment of negative flatband voltage shift. Sample post-deposition annealing at 30 minutes demonstrated the lowest leakage current density and the highest breakdown voltage. This was owing to the acquisition of the lowest effective oxide charge, slow trap density, interface-trap density and total interface-trap density. It was determined that the leakage current of samples post-deposition annealing at 15 and 30 minutes is governed by Ohm's law, Mott-Gurney law and trap-filled-limit conduction. Only Ohm's law and trap-filled-limit conduction are dominating the leakage current of samples post-deposition annealing at 45 minutes. [ABSTRACT FROM AUTHOR]

Effects of postdeposition annealing (PDA) in N2O ambient on metal-organic decomposed CeO2 films deposited on GaN substrate had been reported. The utilization of N2O gas during PDA had successfully suppressed the decomposition of GaN as revealed by x-ray diffraction (XRD). XRD had detected the presence of CeO2 and α-Ce2O3 phases, wherein the phase transformation of CeO2 to α-Ce2O3 led to the formation of β-Ga2O3 interfacial layer (IL). Formation of IL comprising of Ga-O and Ga-O-N compounds in CeO2/GaN system was verified by dark-field scanning transmission electron microscope image and energy dispersive x-ray line profile, respectively. The metal-oxide-semiconductor characteristics of CeO2/GaN structure showed a change of negative to positive effective oxide charge (Qeff) and increasing interface-trap density (Dit) as a function of PDA temperature. The highest oxide breakdown field demonstrated by 1000°C-annealed sample was correlated with Qeff and Dit. A detailed explanation on this correlation as well as current transport mechanism in these oxides has been presented. [ABSTRACT FROM AUTHOR]

Cerium oxide (CeO2) solution was prepared by cerium(lIl) acetylacetonate hydrate, methanol, and acetic acid as the starting materials via the metallorganic decomposition (MOD) method. Postdeposition annealing was performed Onto the MODderived CeO2 films deposited onto ntype Si substrates at different temperatures (600, 800, and 1000°C) under the flow of argon gas. A slow cooling rate was then accomplished for samples to cool down to room temperature. Four orientations [III), (200), (220), and (311)] of CeO2 films were revealed by Xray diffraction analysis as well as csCe2O3 and cerium silicate (Ce2Si2O7). Epitaxiallike behavior was shown in the sample annealed at 600°C due to the (200)oriented CeO2 film, and the dominance of this plane ceased with the increase in annealing temperature. A negative voltage shift was observed in all of the samples, indicating that positive oxide charges were trapped in the oxide as a result of the presence of oxygen vacancies. An interface trap density was extracted from the capacitancevoltage measurement, and it was related to the current densityvoltage characteristics of the investigated samples. The lowest density was perceived by the sample annealed at 1000°C due to the increment in the Ce2Si2O7 layer, reduction in total interface trap density, and effective oxide charge. 0 [ABSTRACT FROM AUTHOR]