Increasing power consumption for electrical interconnects between and inside chips is posing a real challenge to continue the performance scaling of processors/computers as predicted by D. Moore. In recent processors, energy consumption for electrical interconnects is half of power supplied and will be 80% in near future. This challenge strongly has motivated replacing electrical interconnects with optical ones even in chip level communications [1]. This chip-level optical interconnects need quite different performance of optoelectronic devices than required for conventional optical communications. For a light source, the energy consumption per sending a bit is required to be these efforts [2].The hybrid laser consists of a dielectric reflector, a III-V semiconductor active material, and a high-index-contrast grating (HCG) reflector formed in the silicon layer of a silicon-oninsulator (SOI) wafer. ‘Hybrid’ indicates that a III-V active material is wafer-bonded to a silicon SOI wafer. In the hybrid laser, light is vertically amplified between the dielectric and the HCG reflectors, while the light output is laterally emitted to a normal Si ridge waveguide that is connected to the HCG reflector. The HCG works as a vertical mirror as well as a vertical-to-lateral coupler. Very small field penetration into the HCG allows for 3-4 times smaller modal volume than typical vertical-cavity surface-emitting lasers (VCSELs). This leads to high direct modulation speed. Details on device operating mechanism will beexplained in the lecture.Recently, a nano light-emitting diode (LED) with energy/bit < 1fJ/bit [3] and a nano laser diode with a buried heterostructure (BH) active material [4] have been recently reported in the literature. Additionally, device physics, engineering issue, and error-free light detection issue in quantum limit will be discussed in relation to these two structures.