Search

This letter presents a novel linear bootstrapped sampling switch using amorphous indium‐gallium‐zinc‐oxide thin‐film transistors, which is designed using all enhancement n‐type transistors. The switch is simulated at a low supply voltage and a small transistor channel length of 2V and 2μm, respectively. The simulation results across the process corners have shown a maximum variation of 2.2% in the on‐resistance of the switch. Moreover, the worst‐case signal to‐noise‐and‐distortion‐ratio, spurious‐free‐dynamic‐range, and total‐harmonic‐distortion across the process corners have been observed as 66, 70 and −68dB, respectively, at a sampling frequency of 50 kHz. This circuit finds potential applications in implementing an analogue‐to‐digital converter with oxide thin‐film transistors technology, which is an essential block in flexible sensing systems.

This study presents a novel high gain operational amplifier (op-amp) and a comparator using n -type all enhancement amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). The proposed op-amp employs regulated cascode topology in conjunction with capacitive bootstrap load, which enhances the gain to 159.87% (V/V) as compared to op-amp with bootstrapping load. In addition, common mode feedback is introduced in the circuit which improves the common-mode rejection ratio (CMRR) of the amplifier without hampering the output voltage swing. The proposed op-amp offers a voltage gain of 46.2 dB, phase margin of 67°, CMRR of 51.8 dB, unity gain frequency of 215 kHz and power consumption of 0.22 mW. Furthermore, a novel comparator circuit at a clock frequency of 50 kHz is reported. The power consumption of the circuit is 0.248 mW and it can discriminate a minimum voltage of 50 mV. The performance of the proposed circuits is demonstrated using an analytical model of a-IGZO in Cadence environment with a channel length of 20 µm at a supply voltage of 10 V. Further with the help of the circuits reported in this work, many sensing systems of practical importance can be developed, such as smart packaging and bio-medical wearable devices using flexible electronics.

Commercially available wearable systems are increasingly helping people to continuously monitor their health status. To enable continuous monitoring for the battery operated lightweight wearable systems, power consumption is the most critical factor. The battery life of such systems has to be decent to make any acceptable product. In these systems, the power consumption is dominated by the transmitter and readout frontend. This paper presents a low-noise, energy efficient readout front-end, which is dedicated to sensing and pre-processing of vital bio-signals, viz., electrocardiogram and photoplethysmograph for continuous blood pressure estimation. The proposed readout front-end obtains a mid-band gain of 45.97 dB, a band of operation from 0.483 Hz to 967.54 Hz and an input referred noise of $0.184~\mu \text{V}_{\mathrm{ rms}}$ while consuming 145.9 nW from a 1 V power supply. The post-layout simulations of the proposed design were carried out using standard 65 nm CMOS technology. Robust performance has been noticed across the corners within 4% variation compared to the typical case.

This paper presents a linear sampling switch for low-voltage successive-approximation register (SAR) analogue-to-digital converters (ADCs) operating at a frequency of tens of MHz. The proposed switch employs a bootstrapped transmission gate, where the bulk voltages are generated internally to minimize variations in the threshold voltage of transistors with input signal amplitude. Thus, ensuring almost constant and low ON-resistance ($$R_{ON}$$) over complete input signal range without using wide transistors, charge pumps, or both, at low supply voltages. The proposed switch was designed using standard 65 nm CMOS technology. The post-layout simulations have shown a signal to noise and distortion ratio (SNDR) of 87.81 dB, a spurious-free dynamic range (SFDR) of 90 dB and a total harmonic distortion (THD) of $$-91.5\,\hbox {dB}$$ at a sampling frequency and supply voltage of 100 MHz and 0.8 V, respectively. In addition, the switch has shown a maximum variation of 1% in $$R_{ON}$$ over input signal amplitude at different process corners and temperature, which is low compared to other sampling switches reported in the literature.

ECR/2017/000931 POCI-01-0145-FEDER-007688 This paper reports on-chip rail-to-rail timing signals generation thin-film circuits for the first time. These circuits, based on a-IGZO thin-film transistors (TFTs) with a simple staggered bottom gate structure, allow row and column selection of a sensor matrix embedded in a flexible radiation sensing system. They include on-chip clock generator (ring oscillator), column selector (shift register) and row-selector (a frequency divider and a shift register). They are realised with rail-to-rail logic gates with level-shifting ability that can perform inversion and NAND logic operations. These logic gates are capable of providing full output swing between supply rails, $V_{DD}$ and $V_{SS}$ , by introducing a single additional switch for each input in bootstrapping logic gates. These circuits were characterised under normal ambient atmosphere and show an improved performance compared to the conventional logic gates with diode connected load and pseudo CMOS counterparts. By using these high-performance logic gates, a complete rail-to-rail frequency divider is presented from measurements using D-Flip Flop. In order to realize a complete compact system, an on-chip ring oscillator (output clock frequency around 1 kHz) and a shift register are also presented from simulations, where these circuits show a power consumption of 1.5 mW and 0.82 mW at a supply voltage of 8 V, respectively. While the circuit concepts described here were designed for an X-ray sensing system, they can be readily expanded to other domains where flexible on-chip timing signal generation is required, such as, smart packaging, biomedical wearable devices and RFIDs. publishersversion published

This paper presents the experimental characterization of different rectifier circuits using indium–gallium–zinc-oxide thin-film transistor technologies either at NFC or a high frequency range (13.56 MHz) of RFID. These circuits include a single ended rectifier, its differential counterpart, a bridge rectifier, and a cross-coupled full wave rectifier. Diodes were implemented with transistors using conventional processing steps, without requiring short channel devices ( $L =15\,\,\mu \text{m}$ ). Hence, there is no need for either extra masks or processing steps unlike the Schottky diode-based implementation. These circuits were fabricated on a PEN substrate with an annealing temperature not exceeding 180 °C. This paper finds a direct application in flexible low-cost RFID tags since they enable integration of the required electronics to implement tags with the same fabrication steps.

This paper presents a novel mostly passive Δ-Σ ADC using amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistors (TFTs). The ADC circuit consists of passive elements (resistors and capacitors), a novel dynamic comparator, a D-Flip Flop and a pseudo-CMOS BS inverter. In-house oxide TFT model is used for circuit simulations in Cadence environment. The proposed ADC results in effective-number-of-bits (ENOB) of 11.2 bits and a figure-of-merit (FOM) of 0.15 µJ/conversion step at 2 kHz sampling frequency with a 10 V power supply. This circuit would find potential applications in biomedical wearable systems, in which, the ADC is probably the most important block.

Novel nature-based engineered functional materials combined with sustainable and economically efficient processes are among the great challenges for the future of mankind. In this context, this work presents a new generation of versatile flexible and highly conformable regenerated cellulose hydrogel electrolytes with high ionic conductivity and self-healing ability, capable of being (re)used in electrical and electrochemical devices. They can be provided in the form of stickers and easily applied as gate dielectric onto flexible indium–gallium–zinc oxide transistors, decreasing the manufacturing complexity. Flexible and low-voltage (

This paper presents a novel high speed operational amplifier using a-IGZO TFTs for a given technology, without changing device structure, processing conditions and materials. In the proposed design, a negative capacitance generator (NCG) is employed, using a-IGZO TFTs, which is connected to the output of a positive feedback operational amplifier. This technique helps to move the output pole of the amplifier to very high frequency by reducing the overall equivalent capacitance (C eq ) at the output node, as the negative capacitance is in parallel with C eq . By using this technique, the unity gain bandwidth (GB) of the opamp is increased from 486 kHz to 1.474 MHz without compromising other performance metrics, such as, gain and stability (phase margin). However power consumption is increased from 0.3mW to 0.6 mW, when the simulations took place with in-house IGZO TFT models. Both NCG and the amplifier were designed with a minimum feature size of 10 μm and a power supply of 10V and 15V, respectively.

This paper demonstrates, for the first time, the effect of bias stress on the performance of two amorphous Indiumgallium-Zinc Oxide (a-IGZO) thin-film transistor (TFTs) based DC-DC converters, when they are tested close to real-world operating conditions. The individual circuits (Dickson and Cross-coupled DC-DC converters) are characterized under normal ambient with and without continuous bias stress. Under no stress condition, Dickson and Cross-coupled converters are showing almost constant voltages of 3.8V (8.5V), 3.9V (9.3V), when tested at different clock frequencies of 0.25, 1, 5 MHz with a single (a series of two) thin-film batteries, where each battery shows 3V output voltage. When a Cross-coupled DC-DC converter with 6V input is driving other similar circuit, the final output of 16.5V is noticed, demonstrating self-contained electronics with oxide TFTs. Further, individual circuits were stressed for 18000 seconds to mimic real-world conditions. The Dickson (Cross-coupled) converter has shown a variation of 12% (0.7%) and 5% (0.5%) in output DC voltage when tested with a single and a series connection of two batteries, respectively. This work opens a window for self-contained electronics with oxide TFTs under real-world operating conditions.

ECR/2017/000931 POCI-01-0145-FEDER-007688 PTDC/NAN-MAT/30812/2017 This paper presents a high-speed ring oscillator (RO) with amorphous Indium-Gallium-Zinc-Oxide Thin-film transistors (a-IGZO TFTs). The proposed RO reduces the delay of a single stage inverter using intermediate signals generated within the RO, hence, improving the speed. To validate the proposed idea, two conventional ROs (with diode-load load inverter and bootstrapped pseudo-CMOS inverter) and the proposed RO were fabricated at a temperature ≤ 180°C. Measured results of the proposed RO have shown a frequency and power-delay-product (PDP) of 173.2 kHz and 0.7 nJ at a supply voltage of 6V. Further, it shows approximately 155% (44%) increase in frequency and 14% (24.5%) decrease in PDP compared to diode-load inverter (bootstrapped pseudo-CMOS inverter) based ROs. Therefore, the proposed RO finds applications in low-voltage and high speed designs for timing signal generation. publishersversion published

This paper presents a novel high-gain transimpedance amplifier for flexible radiation sensing systems that can be used as large-area dosimeters. The circuit is implemented with indium-gallium-zinc-oxide thin-film-transistors and uses two stages for the amplification of the sensor signal (current). The first stage consists of cascode current mirrors with a diode connected load that performs current amplification and voltage conversion. Then, the first stage is followed by a voltage amplifier based on a positive feedback topology for gain enhancement. The proposed circuit converts nano-ampere (10 nA) currents into hundreds of millivolts (280 mV), showing a gain around 149 dB and a power consumption of 0.45 mW. The sensed radiation dose level, in voltage terms, can drive the next stages in the radiation sensing system, such as analog to digital converters. These radiation sensing devices can find potential applications in real-time, large area, flexible health, and security systems.

This paper proposes a low power ring oscillator by combining current starving technique with negative skewed delay approach. This design has shown an improvement of more than 50% in the power delay product compared to the state of the art techniques. Circuit simulations are carried out in standard 65 nm technology. The proposed circuit has shown a robust performance against temperature and voltage variation within 10%. Therefore this circuit can find potential applications in IoT devices and RFID tags operating from 10 MHz to 1 GHz.

Summary This paper proposed simple and accurate threshold voltage (VTH) extraction techniques, which can be directly adaptable to various semiconductor technologies ranging from deep sub-micron complementary metal–oxide–semiconductor to large-area thin-film transistor devices. These techniques are developed using multiple circuits, namely, a dynamic source follower, an inverter with a diode-connected load and a current mirror topology, which allow a direct determination of VTH. As the proposed techniques are experimented with large-area emerging technologies, which have a stable single type (n-type) transistor, all the designs employed in this work are confined to only n-type transistors for a fair comparison. The semiconductor technologies under consideration are standard complementary metal–oxide–semiconductor (65 and 130 nm) and oxide (indium–gallium–zinc–oxide and zinc–tin–oxide) thin-film transistors. In order to validate the accuracy of the proposed techniques, extracted VTH from these methods are compared against the value from linear transfer characteristics. The resulting relative error is within 5%, reinforcing proposed techniques suitability to different semiconductor technologies ranging from deep sub-micron to large-area transistors. Copyright © 2017 John Wiley & Sons, Ltd.

This paper reports a novel bootstrapping circuit with IGZO TFTs to generate on-chip power supply, mainly for real-time flexible wearable continuous health monitoring system. In order to ensure a compact and reliable system without complex external connections, on-chip power supply is required, to drive biological signal processing or conditioning circuits with IGZO TFTs. Though, integrated system (circuits with oxide TFTs and thin film batteries) can be achieved with printing technique, with the state of art, commercially available thin film printed batteries are confined to 3 V. Typically, flexible electronics with IGZO TFTs needs a power supply > 5 V (depending on the dielectric). The proposed bootstrapping (BS) circuit with IGZO TFTs can generate 2∗V DD and 3∗V DD with the printed batteries output voltage of around 3 V. The proposed circuit is tested with an input voltage spanning between 2 to 10 V and clock frequency up to 1 MHz. When the input voltage is 3 V with the load of 5 MΩ and 2 MΩ, the output which is acquired is 7.9 V and 6.4 V, respectively, with the respective power dissipation of 24.9 μW and 50.8 μW. The circuit simulations are carried out using IGZO TFT model in cadence virtuoso environment, which demonstrate that the BS circuit plays a vital role in the on-chip supply generation for wearable biomedical systems.

This paper proposes a novel low-power operational amplifier (OPAMP) using amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs). By introducing dynamic operation, power consumption of the proposed OPAMP has been significantly reduced without compromising with other design parameters like gain, slew rate etc. In addition, common mode feedback (CMFB) and internal frequency compensation have been used to ensure good common mode rejection ratio (CMRR) and stability of the OPAMP, respectively. In order to demonstrate the proposed idea, low power OPAMP is designed and simulated using in-house a-IGZO TFT model in Cadence Virtuoso. Circuit simulations have been carried out at a supply voltage and device channel length of 10 V and 20 \(\upmu \)m, respectively. From simulations, a gain of 30 dB and unity gain bandwidth of 106.8 kHz with a phase margin of 63\(^{\circ }\) were noticed. The power consumed by the proposed OPAMP is 146.8 \(\upmu \)W, which is significantly lower compared to the OPAMPs implemented with various TFT technologies. The proposed OPAMP circuit would find potential applications in various real-world large area applications that need flexible electronics with low-power consumption like bio-medical and wearable devices.

A low-power five stage current starved ring oscillator which is robust against temperature variations is being presented in this work. The proposed work has been designed using only n-type transistors and therefore, can easily be adapted to amorphous oxide TFTs which have unstable p-type transistors. The ring oscillator uses temperature compensation biasing circuit, which contains a novel bootstrap op-amp. The biasing circuit generates constant bias voltage to make current starved ring oscillator insensitive to temperature variations. The proposed circuit simulations were done in Cadence Virtuoso on standard 180 nm CMOS technology with a supply voltage of 1.8 V. This circuit has shown a frequency of oscillation around 235.8 MHz and a power delay product of 0.139 pJ. The phase noise of designed ring oscillator is \(-98.532\) dBc/Hz. It shows \(3.73\%\) variations in frequency over a temperature range from −40\(\,^{\circ }\)C to 125\(\,^{\circ }\)C. Since oxide TFT’s are also n-type FET’s (Field Effect Transistors), the proposed design can be directly adapted to this emerging post-silicon technology, which finds potential applications in smart packaging, bio-medical and wearable systems [1].

This paper presents novel low-power seven stage differential ring oscillators, which are robust against PVT variations. This work consider two different circuits, namely, current starved and negative skewed PMOS ring oscillators. Power consumption is minimized in these circuits by employing DTMOS (below 0.6 V) technique that adjusts the threshold voltage of the PMOS transistor in a dynamic way. In addition, circuit performance is made robust against PVT variations by using a self biased compensation technique. The biasing circuit changes the control voltage of the differential ring oscillator to maintain a constant frequency. Circuits simulations are carried out in standard 65 nm technology with a supply voltage of 0.5 V. The worst case variation in frequency of oscillation is

project PapEl, reference PTDC/CTM-NAN/5172/2014. PD/BD/52627/2014. SFRH/BD/122286/2016. Electronics on paper enable some specific applications out of conventional ones which require innovative approaches and concepts on the design of devices and systems. Within this context, this work demonstrates that a unique set of characteristics can be combined in planar dual-gate oxide–based field effect transistors with a back floating electrode using paper simultaneously as substrate and dielectric. The working principle of these transistors relies on the formation of electric double layers at the semiconductor/paper and paper/back floating electrode interfaces (associated to ions displacement within the paper) that can be disturbed by a voltage applied at a secondary gate, by the back floating potential or by the combination of both. This feature allows for the control of the on-voltage of the transistors, from depletion to enhancement mode, for instance. Moreover, this specific characteristic allows the implementation of universal logic gates (NAND and NOR) using only one transistor, by setting the proper combination of the voltage level applied at each gate. This way a simple and universal device architecture can be envisaged towards the simplification of the production of low power electronic systems on paper. publishersversion published

The use of disposable recyclable, eco-friendly, sustainable and low-cost devices with multiple functions is becoming a demand in the emerging area of the Internet of Things as a way to decrease the degree of complexity of the electronic circuits required to serve a plethora of applications. Moreover, for low-cost disposable applications, it is relevant the systems to be recyclable. The idea beyond the present study concerns to exploit our imagination with simple questions such as: What happens if it is possible to have a simple and universal device architecture, easy to implement on paper substrates, but capable to provide different multiple functionalities? It would be possible to have a common template for electronic systems on paper that would be then easily customized depending on the final application? The present study answers to these demands by reporting the physics and electronics behavior of a multigate paper transistor where paper is simultaneously the substrate and the dielectric, while a metal-oxide-semiconductor (IGZO) is used as the active channel. Moreover, the same device is able to present logic functionalities simply by varying the amplitude and frequency of the input gate signals. These transistors operate at drain voltages of 1 V with low power, exhibiting ION/IOFF > 104 and a mobility ≈2 cm2 V−1 s−1, serving the specifications for a broad range of smart disposable low power electronics. To sustain all this, an analytical compact model was developed able to precisely reproduce the response of paper-based dual-gate FETs and provide full understanding of their unique and innovative operational characteristics. publishersversion published

ECR/2017/000931. POCI-01-0145-FEDER-007688. SFRH/BD/122286/2016. This paper presents a high speed digitally programmable Ring Oscillator (RO) using Indium-gallium-zinc oxide thin-film transistors (IGZO TFTs). Proposed circuit ensures high speed compared to the conventional ROs using negative skewed scheme, in which each inverter delay is reduced by pre-maturely switching on/off the transistors. In addition, by controlling the load capacitance of each inverter through digital control bits, a programmable frequency of oscillation was attained. Proposed RO performance is compared with two conventional designs under same conditions. From simulation, it has been observed that the proposed circuit has shown a higher frequency of oscillations (283 KHz) compared to the conventional designs (76.52 KHz and 144.9 KHz) under same conditions. Due to the programmable feature, the circuit is able to generate 8 different linearly spaced frequencies ranging from 241.2 KHz to 283 KHz depending upon three digital control bits with almost rail-to-rail voltage swing. The circuit is a potential on-chip clock generator in many real-world flexible systems, such as, smart packaging, wearable devices, RFIDs and displays that need multi frequencies. proof published

Zinc-tin oxide (ZTO) is widely invoked as a promising indium and gallium-free alternative for amorphous oxide semiconductor based thin-film transistors (TFTs). The main bottleneck of this semiconductor material compared to mainstream indium-gallium-zinc oxide (IGZO) is centered in the larger processing temperatures required to achieve acceptable performance (>300 °C), not compatible with low-cost flexible substrates. This work reports for the first time flexible amorphous-ZTO TFTs processed at a maximum temperature of 180 °C. Different aspects are explored to obtain performance levels comparable to IGZO devices at these low processing temperatures, such as hydrogen incorporation during ZTO sputtering and integration with a high-κ multilayer/multicomponent dielectric. Close-to-zero turn-on voltage, field-effect mobility ≈5 cm2 V-1 s-1, and subthreshold slope of 0.26 V dec-1 are obtained. Stability under negative-bias-illumination stress is dramatically improved with hydrogen incorporation in ZTO and device performance is insensitive to bending under a radius of curvature of 15 mm. Inverters using the ZTO TFTs enable rail-to-rail operation with supply voltage V DD as low as 5 V, while a differential amplifier with positive feedback loop provides a gain of 17 dB and unity gain frequency of 40 kHz, limited by the large gate-to-source and gate-to-drain overlaps used herein. authorsversion published