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This research aims at scheduling a set of Batch Processing Machines (BPMs) used to test printed circuit boards in an electronics manufacturing facility. The facility assembles and tests printed circuit boards (or jobs) of different sizes. The BPMs can process a batch of jobs as long as the total size of all the jobs in a batch does not exceed the machine’s capacity. The objective is to minimize the total weighted tardiness, thereby minimize the total penalty incurred by the company for late deliveries. The problem under study is known to be NP-hard. Consequently, a Particle Swarm Optimization (PSO) algorithm has been proposed. Likewise, a heuristic is proposed to simultaneously group the jobs into batches and schedule them on a machine. The effectiveness of the PSO algorithm is examined using random instances and the results were compared to a differential evolution algorithm and a commercial solver used to solve a mixed-integer linear program. Experimental results indicate that the PSO algorithm is very competitive on smaller problem instances and reports better quality solutions in a short time on larger problem instances.

This paper considers the problem of scheduling a single batch processing machine such that the total number of tardy jobs is minimized. The machine can simultaneously process several jobs as a batch as long as the machine capacity is not violated. The batch processing time is equal to the largest processing time among those jobs in the batch. Two decisions are made to schedule jobs on the batch processing machine, namely grouping jobs to form batches and sequencing the batches on the machines. Both the decisions are interdependent as the composition of the batch affects the processing time of the batch. The problem under study is NP-hard. Consequently, solving a mathematical formulation to find an optimal solution is computationally intensive. A Greedy Randomized Adaptive Search Procedure (GRASP) is proposed to solve the problem under study with the assumption of arbitrary job sizes, arbitrary processing times and arbitrary due dates. A novel construction phase for the GRASP approach is proposed to improve the solution quality. In addition, a path relinking procedure is proposed for solving large-sized problems effectively. The performance of the proposed GRASP approach is evaluated by comparing its results to a commercial solver (which was used to solve the mathematical model) and a construction heuristic. Experimental studies suggest that the solution obtained from the GRASP approach is superior compared to the commercial solver and the construction heuristic., 16 figures, 6 tables, 22 pages

A variety of industries use batch processing machines (BPMs) that can process multiple jobs simultaneously per machine. This research considers the scheduling of multiple jobs onto non-identical parallel BPMs while minimising the total weighted tardiness. The problem under study is NP-hard and solving it to optimality using a commercial solver requires long run times when the size of the problem increases. A simulated annealing (SA) approach is proposed to find good solutions for large problem instances within short run times. The results obtained are compared to two metaheuristics, particle swarm optimisation (PSO) and differential evolution (DE), proposed in the literature and a commercial solver (CPLEX). An experimental study is conducted to evaluate the different solution approaches on a set of problem instances. Based on results, the authors conclude that SA is highly effective in solving large problem instances within reasonable run times when compared to CPLEX, PSO and DE.

The primary objective of this research was to develop analytical approximations to predict the time taken to complete a customer order in a warehouse. The problem under study was modelled as a network of queues and the parametric decomposition approach was adopted to develop the approximations. Under this method, the queuing network is decomposed into individual queues allowing to analyse single (i.e., customer order processing, pallet building, and re-pick process) and fork-join stations (i.e., order picking with synchronisation constraints) within the same framework. Analytical formulations to estimate order picking times were developed and compared with equivalent simulation models to estimate the accuracy of the formulations. Appropriate correction terms were also developed to bridge the gap between the analytical approximations and the simulation models. The experimental study conducted indicates that the analytical approximations along with the correction terms can serve as a good estimate for the order picking times in a warehouse.

A scheduling problem commonly observed in the metal working industry has been studied in this research effort. A job shop equipped with one batch processing machine (BPM) and several unit-capacity machines has been considered. Given a set of jobs, their process routes, processing requirements, and size, the objective is to schedule the jobs such that the makespan is minimized. The BPM can process a batch of jobs as long as its capacity is not exceeded. The batch processing time is equal to the longest processing job in the batch. If no batches were to be formed, the scheduling problem under study reduces to the classical job shop problem with makespan objective, which is known to be nondeterministic polynomial time-hard. A network representation of the problem using disjunctive and conjunctive arcs, and a simulated annealing (SA) algorithm are proposed to solve the problem. The solution quality and run time of SA are compared with CPLEX, a commercial solver used to solve the mathematical formulation and with four dispatching rules. Experimental study clearly highlights the advantages, in terms of solution quality and run time, of using SA to solve large-scale problems.

This paper presents a Greedy Randomized Adaptive Search Procedure (GRASP) to minimize the makespan of a capacitated batch-processing machine. Given a set of jobs and their processing times and sizes, the objective is to group these jobs into batches and schedule the batches on a single batch-processing machine such that the time taken to complete the last batch of jobs (or makespan) is minimized. The batch-processing machine can process a batch of jobs simultaneously as long as the total size of all the jobs in that batch does not exceed the machine capacity. The batch-processing time is equal to the longest processing time for a job in the batch. It has been shown that the problem under study is non-deterministic polynomial-time hard. Consequently, a GRASP approach was developed. The solution quality of GRASP was compared to other solution approaches such as simulated annealing, genetic algorithm, and a commercial solver through an experimental study. The study helps to conclude that GRASP outperforms other solution approaches, especially on larger problem instances.

Parallel processing is prevalent in many manufacturing and service systems (i.e. some components may have to wait for other components before the assembly can begin). It is also common to observe manufacturing systems that deal with multiple products, resources shared between different products, and circulation due to random part failures. An example of such a system configuration is observed at a facility equipped to assemble and test web servers. The primary objective of this research was to develop analytical approximations to predict performance measures of a system with the above characteristics and evaluate its accuracy. Manufacturing systems with general distributions, multiple products, job circulation due to failures, resource sharing, and a fork and join system (to model parallel processing of some assembly operations) were studied using the parametric decomposition approach. The different work centers (or stations) in the manufacturing system is modeled as a network of queues and the parametric decomposition approach is applied to decompose the network of queues into individual queues to estimate the performance measure of the system. Existing analytical formulations were modified and appropriate correction terms were added to the approximations to bridge the gap in the error between the analytical approximation and the simulation models. Random instances were generated and the flow times from the approximations and simulation models were compared. The experimental study conducted indicates that the analytical approximations along with the correction terms can serve as a good estimate for the flow times of the manufacturing systems with the above characteristics.

This paper presents a memetic algorithm (MA) to minimize the total weighted number of late jobs (or deliveries) on a single machine. The proposed MA combines a genetic algorithm (GA) with a neighborhood search. The performance of the proposed algorithm is compared with four heuristics from the literature, namely the early due date (EDD), the weighted shortest processing time (WSPT), the forward algorithm (FA), and the weighted forward algorithm (WFA), against 10 benchmark problems and three real-world problems. The results suggest that the MA outperformed the EDD, WSPT, FA, and WFA on the benchmark problems and performed as good as WFA on two of the three real-world problems and outperformed WFA on one real-world problem. The EDD performed the worst among the five solution approaches.

This research is motivated by our interactions with an electronics manufacturer who assembles and tests printed circuit boards (PCBs) used in consumer products. Environmental stress screening (ESS) chambers are commonly used to test PCBs to detect early failures before they are used in the field. The chambers are capable of testing multiple PCBs simultaneously (i.e., batch processing machines). The minimum testing time of each PCB and their size are known. The objective is to group these PCBs into batches and schedule the batches formed on ESS chambers such that the makespan is minimized. The ESS chambers can process a batch of jobs as long as its capacity is not violated. Each ESS chamber is unique with respect to its capacity. The problem is NP-hard. Consequently, a particle swarm optimization (PSO) algorithm is proposed. The effectiveness of the PSO algorithm is evaluated by comparing its results to a random-key genetic algorithm and a commercial solver used to solve a mixed-integer linear program. A thorough experimental study conducted indicates that the PSO algorithm reports better quality solution in a short time on larger problem instances.

Make-to-order (MTO) operations have to effectively manage their capacity to make long-term sustainable profits. This objective can be met by selectively accepting available customer orders and simultaneously planning for capacity. We model a MTO operation of a job-shop with multiple resources having regular and non-regular capacity. The MTO firm has a set of customer orders at time zero with fixed due-dates. The process route, processing times, and sales price for each order are given. Since orders compete for limited resources, the firm can only accept some orders. In this paper a Mixed-Integer Linear Program (MILP) is proposed to aid an operational manager to decide which orders to accept and how to allocate resources such that the overall profit is maximized. A branch-and-price (B&P) algorithm is devised to solve the MILP effectively. The MILP is first decomposed into a master problem and several sub-problems using Dantzig–Wolfe decomposition. Each sub-problem is represented as a network flow problem and an exact procedure is proposed to solve the sub-problems efficiently. We also propose an approximate B&P scheme, Lagrangian bounds, and approximations to fathom nodes in the branch-and-bound tree. Computational analysis shows that the proposed B&P algorithm can solve large problem instances with relatively short time.

This paper considers a flow shop with two batch processing machines. The processing times of the job and their sizes are given. The batch processing machines can process multiple jobs simultaneously in a batch as long as the total size of all the jobs in a batch does not exceed its capacity. When the jobs are grouped into batches, the processing time of the batch is defined by the longest processing job in the batch. Batch processing machines are expensive and a bottleneck. Consequently, the objective is to minimize the makespan (or maximize the machine utilization). The scheduling problem under study is NP-hard, hence, a genetic algorithm (GA) is proposed. The effectiveness (in terms of solution quality and run time) of the GA approach is compared with a simulated annealing approach, a heuristic, and a commercial solver which was used to solve a mixed-integer formulation of the problem. Experimental study indicates that the GA approach outperforms the other approaches by reporting better solution.

This research aims at minimizing the makespan of a set of identical batch processing machines arranged in parallel. Each job is defined by its processing time, ready time, and size. Each machine can process several jobs simultaneously as long as the machine capacity is not exceeded. The batch processing and ready times depend upon the batch composition. The batch processing time is equal to the longest processing job in the batch, and the batch ready time is equal to the largest ready time among those jobs in the batch. The problem under study is NP-hard. Consequently, a constructive heuristic is proposed and its performance with respect to solution quality and computational cost is compared against other solution approaches found in the literature. The computational experiments on a set of randomly generated instances show that the performance of the proposed heuristic is competitive with respect to solution quality and requires little computational cost.

In optoelectronics assembly, the first few stages of the assembly line are dedicated to build the product and the later stages are dedicated for calibration and testing. The assembly line is arranged in a flow shop environment with multiple processors at each stage. When a product (or job) fails at a stage, it is routed back to one of the previous stages or to the same stage (depending upon the nature of the failure). Consequently, the product could circulate between the current stage and the previous stage(s) before it is transferred to the next stage. Estimating the performance measures of such complex manufacturing systems, while considering multiple product classes, random job failures, and resource sharing, is not trivial. This paper presents the approximations used to estimate the performance measures of such complex manufacturing systems with general arrival and service distributions. The analytical approximations have been validated using discrete event simulation and the source of error between them is identified. These approximations can be used by operations managers to estimate the performance measures such as WIP and flow time.

In this paper we consider the problem of scheduling a set of identical batch processing machines arranged in parallel. A Greedy Randomized Adaptive Search Procedure (GRASP) approach is proposed to minimize the makespan under the assumption of non-zero job ready times, arbitrary job sizes and arbitrary processing times. Each machine can process simultaneously several jobs as a batch as long as the machine capacity is not violated. The batch processing time is equal to the largest processing time among those jobs in the batch. Similarly, the batch ready time is equal to the largest ready time among those jobs in the batch. The performance of the proposed GRASP approach was evaluated by comparing its results to a lower bound and heuristics published in the literature. Experimental study suggests that the solution obtained from the GRASP approach is superior compared to other heuristics.

The introduction of 0201 components is another step taken in the world of electronics to aid the miniaturization of electronic products. Capacitors and resistors are now being produced in a 0201 package size; in dimensions, it means a length of 0.02 in and a width of 0.01 in. The assembly of miniature components on printed circuit boards (PCBs) poses numerous process challenges. Legislative measures to eliminate the usage of lead from electronics products compel electronics manufacturers to implement lead-free assembly. This mandates the use of lead-free 0201 components and a lead-free soldering process. The current research focuses on high-density lead-free memory module assemblies using a 1.27-mm-thick organic solderability preservative (OSP)-coated boards. The spacing between components is as low as 0.25 mm. The objective of this research is to develop a robust assembly process for lead-free 0201 components used in memory modules. The stencil, PCB land pattern designs, solder paste printing, component placement, and reflow soldering processes were studied. The process and design changes required for achieving a robust manufacturing process for assembling lead-free 0201 components on high-density assemblies have been identified and reported.

Area array components are increasingly used to miniaturize modern day circuitry. Assembling these surface-mount components using lead-free solder pastes has been the subject of interest for several years. Reworking a ball grid array (BGA) is complicated as the solder joints are hidden underneath the component. The process window to rework a BGA is narrow. There are several critical factors which complicate and affect the repeatability of the rework process. The objective of this research is to develop a reliable and repeatable process to rework lead-free fine-pitch BGAs. The process steps to rework a BGA are component removal, site redressing, solder paste/flux deposition, component replacement, and reflow. This study applied designed experiments to evaluate multiple alternatives for several rework process steps. Two alternatives for site redressing, namely copper wick with soldering iron and vacuum desoldering are evaluated. Similarly, the application of solder paste versus flux is compared. A localized reflow method at the rework machine is compared with solder reflow using a reflow oven. The pros and cons of using the two reflow methods and the effect of multiple reflow cycles on solder joint reliability is discussed. Nozzles with and without thermal shields were evaluated. A nozzle with deflectors on the outer side was found to work satisfactorily. Localized reflow in a semiautomated rework machine resulted in partial reflow of components adjacent to the reworked BGA. Thermal repeatability was also a concern. A 15degC drop in temperature was observed with the use of CoolCaps. The soldering iron with wick redressing method was less time consuming. Applying paste using a ministencil posed challenges due to lack of real-estate around the reworked BGA. A reliability study consisting of cross-sectional analysis, scanning electron microscopy (SEM), thermal shock, and thermal cycling were conducted to determine the reliability of the reworked solder joints. The copper wick with soldering iron method was favorable in terms of cycle time. The reflow oven is preferred as it avoids partial reflow of adjacent components. Localized reflow is effective when CoolCaps are used. The flux attachment process was easier as the real-estate around the reworked BGA is very limited. All the assemblies subjected to thermal shock and cycling passed the functional test.

Dual-head placement machines are important in the assembly of circuit cards because they offer the capability to place large components accurately. This paper presents a novel column-generation approach for optimizing the placement operations of a dual-head placement machine with the ultimate goal of improving the efficiency of assembly operations. Research objectives are a model that reflects relevant, practical considerations; a solution method that can solve instances within reasonable run times; and tests to establish computational benchmarks. Test results demonstrate the efficacy of our optimization approach on problems of realistic size and scope.

Batch-processing machines can process several jobs simultaneously. These machines are commonly used to test Printed Circuit Boards (PCBs). The processing time and the dimensions of the PCB are given. Each batch is formed such that the total size of all the PCBs in the batch does not exceed the machine capacity. The batch processing time is equal to the longest processing time of all the PCBs in the batch. These batch processing machines are expensive and a bottleneck. Scheduling PCBs on these parallel batch processing machines to minimize their makespan is NP-hard. Consequently, we propose several heuristics. The performance of the proposed heuristics is compared to a simulated annealing approach and a commercial solver.

This paper aims at improving the utilization of a single batch-processing machine. The batch-processing machine can process a batch of jobs, as long as the number of jobs and the total size of all the jobs in a batch do not violate the machine's capacity. The processing time of the job and its size is known. The processing time of a batch is the longest processing time among all the jobs in the batch. The objective is to minimize the makespan. Since the problem under study is NP-hard, a Simulated Annealing (SA) approach is proposed. The effectiveness of our solution procedure in terms of solution quality and run time is evaluated through experiments. The results obtained from the SA approach were compared with a commercial solver called CPLEX. Our computational study demonstrates the effectiveness of our approach in solving problem instances with 20 or more jobs in a shorter run time with better solutions.

1School of Management, Shenyang University of Technology, Shenyang, Liaoning 110870, China 2School of Science, Shenyang Ligong University, Shenyang, Liaoning 110159, China 3School of Mathematics and Statistics, Ludong University, Yantai, Shandong 264025, China 4Institute of Business Informatics, Wroclaw University of Economics, Komandorska 118/120, 53-345 Wroclaw, Poland 5Department of Industrial and Systems Engineering, Northern Illinois University, DeKalb, IL 60115, USA 6School of Economics and Management, Shanghai Second Polytechnic University, Shanghai 201209, China

This paper aims at minimizing the makespan for a batch-processing machine. The processing times and the sizes of the jobs are known. The machine can process a batch as long as its capacity is not exceeded. The processing time of a batch is the longest processing time of all the jobs in that batch. This problem is NP-hard and hence a genetic algorithm (GA) approach is proposed. Random instances were used to test the effectiveness of the proposed approach. The results obtained from GA were compared with a simulated annealing approach and a commercial solver. The results indicate that the GA was able to arrive at better makespan with shorter run times.

Environmental and health concerns, due to the leaching of lead from landfills into ground water, have necessitated legislation that restricts the use of lead in electronics. The transition from the eutectic tin-lead composition used in electronic solders to lead-free solder is imminent. Understanding the impact of this transition on lead-free wave soldering is crucial because a large segment of printed circuit boards (PCBs) used in electronic home appliances are wave soldered. The usage of volatile organic compound (VOC)-free flux chemistry is expected to gather momentum in conjunction with lead-free wave soldering because of process requirements and environmental considerations. A thorough review of published literature indicated that there is limited information available on the application of water-soluble VOC-free flux chemistries for lead-free wave soldering. Consequently, the objectives of this research were to select a preferred VOC-free water-soluble flux chemistry, understand the process window of wave soldering using a 96.5Sn/3.0Ag/0.5Cu lead-free alloy, and study the impact of the lead-free wave soldering process on different surface finishes. Many of the earlier process recommendations were based on a solder pot temperature of 260 degC and higher. However, the packaging of through hole components may not withstand the higher pot temperature and longer contact time. Hence, assembly at a lower solder pot temperature and shorter contact time are highly desired. Consequently, experiments were conducted to verify the feasibility of reducing the solder pot temperature (250 degC) and the contact time (2 s). Three VOC-free fluxes, from three different vendors, were evaluated and the best flux chosen was used to establish the process window. It was demonstrated through this study that it is possible to wave solder, using a lead-free solder with low silver content, different surface finishes with a wide process window. The effect of lead-free process temperatures on the cleaning of the VOC-free water-soluble flux residues was evaluated. Residues were washed and cleaned using the existing equipment sets without any change in the process parameters. The process developed based on the initial set of experiments has been validated by the successful assembly of a number of lead-free prototype assemblies

PurposeThe leaching of lead from electronic components in landfills to ground water is harmful to health and to the environment. Increasing concern over the use of lead in electronics manufacturing has led to legislation to restrict its use as a joining material. Consequently, significant recent research efforts have been geared to identification of suitable lead‐free solder pastes. Typically, lead‐free solder pastes contain a very active flux in an effort to improve wetting. These aggressive fluxes have the tendency to explode (or burst) and create flux spatter, causing many process problems with sensitive electronic components. The purpose of this paper is to propose solution procedures to minimize/eliminate these flux spatters, particularly, on gold fingers in memory modules when lead‐free solder pastes are used.Design/methodology/approachFour no‐clean, lead‐free Sn‐Ag‐Cu (SAC) alloy‐based solder pastes consisting of four different flux systems from three different vendors were evaluated. Two types of reflow profiles (linear and ramp‐soak‐ramp) were also evaluated. Experiments were also conducted to optimise the soak temperature and soak time to determine a broader process window for lead‐free volume production with minimal flux spatter on the contact fingers of memory modules. In order to validate our findings the recommended profile and paste was adopted in production. Additional experiments on a board with a different surface finish were also carried out to validate the recommendations.FindingsFlux spatter can be reduced/eliminated through proper selection of flux chemistry and reflow profile optimisation. The experimental study conducted indicates there is a reduction in the occurrence of flux spatter when a ramp‐soak‐ramp profile is used with lead‐free solder pastes.Originality/valueDemonstrates that flux spatter can be reduced/eliminated by carefully choosing a soak profile and appropriate flux chemistry.

High technology products such as notebook computers and digital cameras have short life cycles due to global competition and rapid technological advances. As newer products, replete with latest technologies, become available, the demand for older products erodes. To renew the competitiveness of a product, the manufacturer may upgrade its features over time. Since products comprise a set of features with several alternatives for each, design involves complicated decisions: which features to upgrade, what alternatives should be chosen, and when to upgrade. This paper proposes a model to prescribe profitable upgrades of individual features in a family of products. The model integrates decisions traditionally made by various organizations in the enterprise (marketing, product design engineering, process design engineering, production planning and supply chain management). The special structures embedded in the model are identified and decomposition principles are applied to solve large-scale instances of the ...

PurposeHistorically, tin‐lead solder has been a commonly used joining material in electronics manufacturing. Environmental and health concerns, due to the leaching of lead from landfills into ground water, have necessitated legislation that restricts the use of lead in electronics. The transition from tin‐lead solder to a lead‐free solder composition is imminent. Several alternative solder alloys (and their fluxes) have been researched for electronics assembly in the last few years. The objective of this research was to develop a systematic selection process for choosing a “preferred” lead‐free solder paste, based on its print and reflow performance.Design/methodology/approachAfter a detailed study of industry preferences, published experimental data, and recommendations of various industrial consortia, a near eutectic tin‐silver‐copper (SAC) composition was selected as the preferred alloy for evaluation. Commercially available SAC solder pastes with a no‐clean chemistry were extensively investigated in a simulated manufacturing environment. A total of nine SAC pastes from seven manufacturers were evaluated in this investigation. A eutectic Sn/Pb solder paste was used as a baseline for comparison. While selecting the best lead‐free paste, it was noted that the selected paste has to perform as good as, if not better than, the current tin‐lead paste configuration used in electronics manufacturing for a particular application. The quality of the solder pastes was characterized by a series of analytical and assembly process tests consisting of, but not limited to, a printability test, a solder ball test, a slump test, and post reflow characteristics such as the tendency to form voids, self‐centring and wetting ability.FindingsEach paste was evaluated for desirable and undesirable properties. The pastes were then scored relative to each other in each individual test. An aggregate of individual test scores determined the best paste.Originality/valueThis paper summarizes a systematic approach adopted to evaluate lead‐free solder pastes for extreme reflow profiles expected to be observed in reflow soldering lead‐free boards.

Batch processing machines are commonly used in wafer fabrication, kilns, and chambers used for environmental stress screening (ESS). This paper proposes two models to schedule batches of jobs on two machines in a flow shop. A set of jobs with known processing times and sizes has to be grouped, to form batches, in order to be processed on the batch processing machines. The jobs are nonidentical in size. The processing time of a batch is the longest processing time of all the jobs in that batch. Mixed integer formulations are proposed for the flow shop problem when the buffer capacity is unlimited or zero. Numerical examples are presented to demonstrate the application of our model.

A simulated annealing approach to minimize makespan for identical parallel batch-processing machines is presented. Each job has a corresponding processing time and size. The machine can process the jobs in batches as long as the total size of all the jobs in a batch does not exceed the machine capacity. The processing time of a batch is equal to the longest processing time among all the jobs in the batch. Random instances were generated to test the approach with respect to solution quality and run time. The results of the simulated annealing approach were compared with CPLEX. The approach outperforms CPLEX on most of the instances.

This research proposes a simulated annealing (SA) approach to minimize makespan for a single batch-processing machine. Each job has a corresponding processing time and size. The machine can process the jobs in batches as long as the machine capacity is not exceeded. The processing time of a batch is equal to the longest processing time among all jobs in the batch. Random instances were generated to test our approach with respect to solution quality and run time. The results of the SA approach were compared to CPLEX. Our approach outperforms CPLEX on all the instances.

Demand for a family of high-technology products such as notebook computers erodes over time as competitors introduce new products that incorporate improved technologies. A manufacturer may compensa...

This paper analyses push and pull systems with transportation consideration. A multiproduct, multiline, multistage production system was used to compare the two systems. The effects of four factors (processing time variation, demand variation, transporters, batch size) on throughput rate, average waiting time in the system and machine utilization were studied. The study uses metamodels to compare the two systems. They serve a dual purpose of expressing system performance measures in the form of a simple equation and reducing computational time when comparing the two systems. Research shows that the number of transporters used and the batch size have a significant effect on the performance measures of both systems.