1. Effects of guard bands and well contacts in mitigating long SETs in advanced CMOS processes
- Author
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Narasimham, Balaji, Bhuva, Bharat L., Schrimpf, Ronald D., Massengill, Lloyd W., Gadlage, Matthew J., Holman, W. Timothy, Witulski, Arthur F., Robinson, William H., Black, Jeffrey D., Benedetto, Joseph M., and Eaton, Paul H.
- Subjects
Complementary metal oxide semiconductors -- Properties ,Complementary metal oxide semiconductors -- Design and construction ,Pulse-duration modulation -- Evaluation ,Transients (Dynamics) -- Evaluation ,Nuclear research ,Business ,Electronics ,Electronics and electrical industries - Abstract
Mixed mode TCAD simulations are used to show the effects of guard bands and high density well contacts in maintaining the well potential after a single event strike and thus reduce the width of long transients in a 130-nm CMOS process. Experimental verification of the effectiveness in mitigating long transients was achieved by measuring the distribution of SET pulse widths produced by heavy ions for circuits with isolated contacts and for circuits with guard bands combined with larger contacts in a 130-nm process using an autonomous characterization technique. Heavy-ion test results indicate that controlling the well potential by using guard bands, along with high density well contacts, helps eliminate > 70 % of SETs longer than 1 ns. Index Terms--CMOS, guard band, parasitic bipolar, pulse width, single event transient (SET), single event upset (SEU), soft error, well contact.
- Published
- 2008