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The dynamic variation of impedance during different operating modes of a thyristor-controlled series capacitor (TCSC)-compensated transmission line imposes protection challenges to conventionally used distance relays. The problem becomes further complicated when these lines are connected to present-day large-capacity doubly fed induction generator (DFIG)-based wind farms. In this article, a cutting-edge relaying algorithm is suggested for the protection of such crucial lines by extracting useful features from the local current signals using a single-pole filtering technique. The extracted features are further used to generate red–green–blue images for the convolutional neural network classifier for improved detection and classification of faults. The performance of this method is validated on several fault and nonfault data generated on 2-bus, WSCC 9-bus, and IEEE 39-bus test power systems considering TCSC- and DFIG-based wind farms in the network through a real-time digital simulator. The operation of the actual relay is validated through SEL 451, and the algorithm is accomplished by OPAL-RT (OP5600). The high fault detection accuracy (100%, 100%, and 100%) and classification accuracy (99.30%, 99.50%, and 99.20%) and the comparative study can claim the strength of the proposed method.

A novel dedicated hardware architecture is proposed in this letter for one-dimensional non-local means (NLM) algorithm. The patch-based NLM algorithm has been effectively used to filter out noises from the two-dimensional images as well as various one-dimensional signals, such as an electrocardiogram (ECG) and audio signals. Dedicated hardware ensures the availability, predictability and stability of an algorithm. In this letter, an efficient hardware architecture of the NLM is proposed for removing noises from the corrupted ECG signal. The proposed architecture is implemented on a field-programmable gate array. The efficacy of the proposed architecture is verified by a firm comparison of the outputs obtained from both the hardware architecture and the software simulation performed on MATLAB. The computational complexity has also been compared for both cases (hardware and software) to show the effectiveness of the proposed hardware architecture.