556 results on '"Platzner, Marco"'
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2. AutonomROS: A ReconROS-based Autonomous Driving Unit
3. Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms
4. fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications
5. ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications
6. Design of Distributed Reconfigurable Robotics Systems with ReconROS
7. On Guaranteeing Schedulability of Periodic Real-Time Hardware Tasks Under ReconOS
8. On Guaranteeing Schedulability of Periodic Real-Time Hardware Tasks Under ReconOS$$^{64}$$
9. Integrating Safety Guarantees into the Learning Classifier System XCS
10. FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics
11. Optimization of Application-Specific L1 Cache Translation Functions of the LEON3 Processor
12. Timing Optimization for Virtual FPGA Configurations
13. Integrating Safety Guarantees into the Learning Classifier System XCS
14. Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures
15. Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
16. Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
17. Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms
18. FPGADDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications
19. Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis
20. Timing Optimization for Virtual FPGA Configurations
21. An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology
22. Combining Local and Global Search: A Multi-objective Evolutionary Algorithm for Cartesian Genetic Programming
23. An FPGA/HMC-Based Accelerator for Resolution Proof Checking
24. Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes
25. CIRCA: Towards a modular and extensible framework for approximate circuit generation
26. Zynq-based acceleration of robust high density myoelectric signal processing
27. Self-aware Computing: Introduction and Motivation
28. Conclusions and Outlook
29. Self-aware Compute Nodes
30. Optimization of Application-Specific L1 Cache Translation Functions of the LEON3 Processor
31. Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
32. I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems
33. FPGAs im Rechenzentrum
34. MAAS: Hiding Trojans in Approximate Circuits
35. Using Deep Convolutional Neural Networks in Monte Carlo Tree Search
36. ReconOS
37. Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus
38. Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures
39. Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning
40. On-The-Fly Verification of Reconfigurable Image Processing Modules Based on a Proof-Carrying Hardware Approach
41. ReconOS: An Operating System for Dynamically Reconfigurable Hardware
42. Integrating Software and Hardware Verification
43. On Semeai Detection in Monte-Carlo Go
44. Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection
45. An FPGA/HMC-Based Accelerator for Resolution Proof Checking
46. Combining Local and Global Search: A Multi-objective Evolutionary Algorithm for Cartesian Genetic Programming
47. Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS
48. RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures
49. Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs
50. Automated Framework for Fast Synthesis of Approximate Hardware Accelerators
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