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1. NOVA: NoC-based Vector Unit for Mapping Attention Layers on a CNN Accelerator

2. Shenjing: A low power reconfigurable neuromorphic accelerator with partial-sum and spike networks-on-chip

3. 1.63 pJ/SOP Neuromorphic Processor With Integrated Partial Sum Routers for In-Network Computing

6. Case Studies

7. Conclusions

8. Routing

10. Flow Control

11. Topology

13. Introduction

14. ORION 2.0: A Fast and Accurate NoC Power and Area Model for Early-Stage Design Space Exploration

15. SeRaNDiP

17. Conclusions

18. Topology

19. Introduction

20. Routing

21. Flow Control

27. Design Tools for Application Specific Embedded Processors

28. Flow Control

31. On-Chip Networks

32. Introduction

33. Conclusions

34. Topology

35. Routing

36. REACT

39. Sentry-NoC

41. SCORPIO: a 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering

49. Routing

50. Topology

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