18 results on '"Payandehnia, Pedram"'
Search Results
2. A Highly Linear OTA-Less 1-1 MASH VCO-Based $\Delta\Sigma$ ADC With an Efficient Phase Quantization Noise Extraction Technique
3. A Highly Linear OTA-Free VCO-Based 1-1 MASH $\Delta\Sigma$ ADC
4. An Amplifier-Free 0–2 SAR-VCO MASH ΔΣ ADC
5. 0.9V, 79.7dB SNDR, 2MHz-BW, Highly linear OTA-less 1-1 MASH VCO-based ΔΣ with a Novel Phase Quantization Noise Extraction Technique
6. A 72.4-dB SNDR 92-dB SFDR Blocker Tolerant CT $\Delta\Sigma$ Modulator With Inherent DWA
7. A Novel Time-Domain Phase Quantization Noise Extraction for a VCO-based Quantizer
8. A 0.49–13.3 MHz Tunable Fourth-Order LPF with Complex Poles Achieving 28.7 dBm OIP3
9. A highly linear OTA-free VCO-based 1-1 MASH ΔΣ ADC
10. A passive CMOS low-pass filter for high speed and high SNDR applications
11. A noise-coupled time-interleaved delta-sigma modulator with shifted loop delays
12. Multi-step counting ADC
13. Sequential interstage correlated double sampling: A switched-capacitor technique for high accuracy systems
14. A 12.5Gb/s 6.6mW receiver with analog equalizer and 1-tap DFE
15. A 12.5Gb/s active-inductor based transmitter for I/O applications
16. A 4mW 3-tap 10 Gb/s decision feedback equalizer
17. A low power 9.5 ENOB 100MS/s pipeline ADC using correlated level shifting
18. High speed CML latch using active inductor in 0.18μm CMOS technology.
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.