7 results on '"Panati, Serena"'
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2. Results from CHIPIX-FE0, a Small Scale Prototype of a New Generation Pixel Readout ASIC in 65nm CMOS for HL-LHC
3. A Compact, Low Jitter, CMOS 65 nm 4.8–6 GHz Phase-Locked Loop for Applications in HEP Experiments Front-End Electronics
4. Results from CHIPIX-FE0, a Small-Scale Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for HL-LHC
5. MATISSE: a Low Power Front-End Electronics for MAPS Characterization
6. 600 Mrad TID effects on a new generation high rate Pixel Readout ASIC in 65nm CMOS with low-power, low noise synchronous analog front-end using Fast ToT encodingand auto-zeroing
7. MATISSE: A Versatile Readout Electronics for Monolithic Active Pixel Sensors Characterization
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