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Electrostatically doped graphene p–n junctions can modulate graphene nanoribbon conductance and can be indispensable parts of nanoelectronic graphene circuits. Much research has been conducted on such devices with one rectangular top gate and one back gate with very encouraging results. Recently, graphene p–n junctions with two rectangular top gates have been proposed and their study revealed a rich behaviour that allows their use in both analogue and digital nanoelectronic circuits. Here we study graphene p–n junctions with two trapezoid top gates and a common back gate with special focus to the effect of the angle and the distance between the two top gates. Furthermore, trapezoid top gates with angles of 45° make use of the Veselago lens effect, allowing an effective control by tuning density of states and carrier density. We simulated these devises using the non-equilibrium Green’s function method combined with tight-binding Hamiltonians in the ballistic transport limit. Our results show that the conductance of these graphene p–n junctions can be successfully controlled by various combinations of different parameters that allows for realisation of carbon-based logic gates. We also present the design and simulation a universal set Boolean gates, namely NOT, NAND and NOR.

Metal-Insulator-Metal type memristors as emergent nano-electronic devices have been successfully fabricated and used in non-conventional and neuromorphic computing systems in the last years. Several behavioral or physical based models have been developed to explain their operation and to optimize their fabrication parameters. Among them, the resistance switching of the insulating layer due to the formation of conductive filaments is the most well respected and experimentally proven. All existing memristor models are trade-offs between accuracy, universality and realism, but, to the best of our knowledge, none of them is purely characterized as quantum mechanical, despite the fact that quantum mechanical processes are a major part of the memristor operation. In this paper, we employ quantum mechanical methods to develop a complete and accurate filamentary model for the resistance variation during memristor's operating cycle. More specifically, we apply quantum walks to model and compute the motion of atoms forming the filament, tight-binding Hamiltonians to capture the filament structure and the Non-Equilibrium Green's Function (NEGF) method to compute the conductance of the device. Furthermore, we proceeded with the parallelization of the overall model through Graphical Processing Units (GPUs) to accelerate our computations and enhance the model's performance adequately. Our simulation results successfully reproduce the resistive switching characteristics of memristors devices, match with existing fabricated devices experimental data, prove the efficacy and robustness of the proposed model in terms of multi-parameterization, and provide a new and useful insight into its operation.

© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. Graphene nanoribbons (GNRs) are the most important emerging Graphene structures for nanoelectronic and sensor applications. GNRs with perfect lattices have been extensively studied, but fabricated GNRs contain lattice defects the effect of which on their electronic properties has not been studied extensively enough. In this paper, we apply the Non-Equilibrium Green's function (NEGF) method combined with tight-binding Hamiltonians to investigate the effect of lattice defects on the conductance of GNRs. We specifically study, butterfly shaped GNRs, which operate effectively as switches, and have been used in CMOS-like architectures. The cases of the most usual defects, namely the single and double vacancy have been analytically examined. The effect of these vacancies was computed by placing them in different regions and with various numbers on GNR nano-devices, namely edges, main body, contacts and narrow regions. The computation results are presented in the form of energy dispersion diagrams as well as diagrams of maximum conductance as a function of the number of lattice defects. We also present results on the defect tolerance of the butterfly shaped GNR devices.

Graphene is a 2D material with spectacular properties. Its elasticity and biocompatibility make it appropriate for stretchable electronics and bioelectronics applications respectfully. In this work, we present the design of a Graphene Nanoribbon (GNR) based XOR gate and a 3-input XOR gate, extending the universal set of AND, NOT, OR gates already presented in literature, and verifying their operation by computing its conductance. Our proposed topology allows XOR gate scaling from 2-inputs to 3-inputs with zero increase in active area. Moreover, it operates when deposited on a wide range of substrates, due to the lack of back gate bias, enabling its possible use in stretchable and biocompatible electronics applications. © 2022 IEEE.

One of the most promising and powerful candidates for future computing is the notion of universal quantum computer. A vital advance towards this direction is the development of quantum simulators and their possible implementation either as standalone quantum systems or as compatible software for classical computers with pros and cons. On the other hand, memristive computing has been proposed recently as a tentative unconventional computing scheme promoting the idea of information storage and processing in the same nanoelectronic device. In this paper we present a memristive quantum computing simulator by coupling quantum simulation principles with memristor aspects and enabling us to tackle the existing difficulties on qubit representation in conventional computing systems. For doing so, we utilize the memristances of identical memristors to represent in 3D the qubit state while its corresponding evolution is defined by the memristors input voltages. In particular, we introduce an appropriate correspondence among the aforementioned memristor voltages and the general qubit state rotation, i.e., the one-qubit quantum gates, and as such we reproduce the rotations imposed by the action of quantum gates in the 3D memristance space. Moreover, we also define the action of the CNOT two-qubit gate and simulate entanglement between two qubits paving the way towards the establishment of a universal set for quantum computing. Our results show that, memristor circuits can simulate effectively quantum computations.

The results of the experimental investigation of the relationship between the low-frequency noise spectrum of the electric current through conducting filaments in Si3N4 films with a thickness of 6 nm on n ++-Si(001) conducting substrates and retention characteristics of these filaments are reported. Two structures are investigated: Si3N4/Si, thin (about 6 nm) Si3N4 film on the n++-Si substrate; Si3N4/SiO2/Si, a similar structure with a 2 nm SiO2 sublayer between the film and the substrate. A detailed comparison of the experimentally extracted parameters, such as average current through the filament, probability density function, and spectrum, is presented with a discussion of possible physical reasons for the difference between the testing structures and their effect on retention characteristics.

State-of-the-art IoT technologies request novel design solutions in edge computing, resulting in even more portable and energy-efficient hardware for in-the-field processing tasks. Vision sensors, processors, and hardware accelerators are among the most demanding IoT applications. Resistance switching (RS) two-terminal devices are suitable for resistive RAMs (RRAM), a promising technology to realize storage class memories. Furthermore, due to their memristive nature, RRAMs are appropriate candidates for in-memory computing architectures. Recently, we demonstrated a CMOS compatible silicon nitride (SiNx) MIS RS device with memristive properties. In this paper, a report on a new photodiode-based vision sensor architecture with in-memory computing capability, relying on memristive device, is disclosed. In this context, the resistance switching dynamics of our memristive device were measured and a data-fitted behavioral model was extracted. SPICE simulations were made highlighting the in-memory computing capabilities of the proposed photodiode-one memristor pixel vision sensor. Finally, an integration and manufacturing perspective was discussed.

Over the last years there has been significant progress in the development of quantum computers. It has been demonstrated that they can accelerate the solution of various problems exponentially compared to today's classical computers, harnessing the properties of superposition and entanglement, two resources that have no classical analog. Since quantum computer platforms that are currently available comprise only a few tenths of qubits, as well as the access to a fabricated quantum computer is time limited for the majority of researchers, the use of quantum simulators is essential in developing and testing new quantum algorithms. Taking inspiration from previous work on developing a novel quantum simulator based on memristor crossbar circuits, in this work, a framework that automates the circuit design of emulated quantum gates is presented. The proposed design framework deals with the generation and programming of memristor crossbar configuration that incor­porates the desirable quantum circuit, leading to a technology agnostic design tool. To such a degree, various quantum gates can be efficiently emulated on memristor crossbar configurations for various types of memristive devices, aiming to assist and accelerate the fabrication process of a memristor based quantum simulator.

Research progress in edge computing hardware, capable of demanding in-the-field processing tasks with simultaneous memory and low power properties, is leading the way towards a revolution in IoT hardware technology. Resistive random access memories (RRAM) are promising candidates for replacing current non-volatile memories and realize storage class memories, but also due to their memristive nature they are the perfect candidates for in-memory computing architectures. In this context, a CMOS compatible silicon nitride (SiN) device with memristive properties is presented accompanied by a data-fitted model extracted through analysis of measured resistance switching dynamics. Additionally, a new phototransistor-based image sensor architecture with integrated SiN memristor (1P1R) was presented. The in-memory computing capabilities of the 1P1R device were evaluated through SPICE-level circuit simulation with the previous presented device model. Finally, the fabrication aspects of the sensor are discussed.

The time series of the brain are usually characterized by the co-existence of synchronized and desynchronized behaviors. This kind of behavior is related to normal and disorderly functions of the brain. One of the suggested mechanisms to understand thoroughly this behavior are chimera states, which are characterized by the coincidence of coherent and incoherent dynamics that can be exploited through networks of symmetrically coupled identical oscillators. In this work, ring-based networks of Chua's circuits, the simplest electronic oscillators that perform chaotic and well-known bifurcation phenomena, have been extensively studied in memristive crossbars (Xbar), revealing various collective spatio-temporal behaviors, such as chimera states. With respect to different Xbar connectivities and via SPICE-level circuit simulations, the proposed Xbar system proves its efficacy to reproduce spatio-temporal patterns spanning from complete synchronization and chimera states up to fully chaotic states.

Resistance switching devices are of special importance because of their application in resistive memories (RRAM) which are promising candidates for replacing current nonvolatile memories and realize storage class memories. These devices exhibit usually memristive properties with many discrete resistance levels and implement artificial synapses. The last years, researchers have demonstrated memristive chips as accelerators in computing, following new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM or MIS structures. Understanding of the mechanism and the dynamics of resistance switching is very critical for the modeling and use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes, respectively. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and appropriate current compliance setting, multi-level resistance operation can be achieved. Furthermore, a flexible tuning protocol for multi-level resistance switching was developed applying appropriate SET/RESET pulse sequences. Retention and random telegraph noise measurements performed at different resistance levels. The present results reveal the attractive properties of the examined devices.

Context: Only 55% of the athletes return to competitive sports after an anterior cruciate ligament (ACL) injury. Athletes younger than 25 years who return to sports have a second injury rate of 23%. There may be a mismatch between rehabilitation contents and the demands an athlete faces after returning to sports. Current return-to-sports (RTS) tests utilize closed and predictable motor skills; however, demands on the field are different. Neurocognitive functions are essential to manage dynamic sport situations and may fluctuate after peripheral injuries. Most RTS and rehabilitation paradigms appear to lack this aspect, which might be linked to increased risk of second injury. Objective: This systematic and scoping review aims to map existing evidence about neurocognitive and neurophysiological functions in athletes, which could be linked to ACL injury in an integrated fashion and bring an extensive perspective to assessment and rehabilitation approaches. Data Sources: PubMed and Cochrane databases were searched to identify relevant studies published between 2005 and 2020 using the keywords ACL, brain, cortical, neuroplasticity, cognitive, cognition, neurocognition, and athletes. Study Selection: Studies investigating either neurocognitive or neurophysiological functions in athletes and linking these to ACL injury regardless of their design and technique were included. Study Design: Systematic review. Level of Evidence: Level 3. Data Extraction: The demographic, temporal, neurological, and behavioral data revealing possible injury-related aspects were extracted and summarized. Results: A total of 16 studies were included in this review. Deficits in different neurocognitive domains and changes in neurophysiological functions could be a predisposing risk factor for, or a consequence caused by, ACL injuries. Conclusion: Clinicians should view ACL injuries not only as a musculoskeletal but also as a neural lesion with neurocognitive and neurophysiological aspects. Rehabilitation and RTS paradigms should consider these changes for assessment and interventions after injury.

General purpose processors have been used in a wide variety of computational and modeling applications. However, their performance is not always sufficient when simulating neural networks, which are widely applied to signal processing and pattern recognition. In this work, after a systematic study of the computational requirements of such neural networks and an exploration of the available hardware solutions through which the aforementioned applications can be accelerated, a modern neuromorphic circuit structure is proposed with its operation attributed to memristor devices and segmented crossbar architecture. By coupling these two technologies, neuromorphic circuits have been designed with high computational performance versus integration scale and power consumption. An Ex-Situ training paradigm based on the advantageous memristor segmented crossbar is proposed, using the MNIST dataset and resulting at 97% accuracy. At the same time, a novel memristor tuning method on 1D1M configuration has been developed, able to increase the memristor programming speed.

Cellular Automata (CAs), a ubiquitous computational tool proposed by John von Neumann, illustrate how great complexity emerges from simple rules of dynamical transitions between space and time interconnected simplistic entities. CAs perform as mathematical computation models, but also they are a powerful medium to model nature and natural systems. As a computational platform, CAs come with unified memory and computation in the same physical area, attributed as a strong candidate against the limitations of data transfer, known as the von Neumann bottleneck. On the other hand, Memristors with their inherent Computing-In-Memory compatibility, can be easily considered as appropriate nanoelectronic devices to be coupled with CAs towards an energy and time efficient computational paradigm. In particular, CA present a vast area of applications, comprising various $NP$ -complete hard to be solved problems arriving from computer science field, like the well-known Shortest Path, Bin Packing, Knapsack and Max-clique problems, as well as physical, chemical and biological processes and phenomena, such as epileptic seizures in relation with healthy and pathogenic brain regions and, moreover, real life applications like pseudorandom number generation and simplistic, but with highly complex behavior, models like the famous Game of Life. The outcome of employing Memristors in CAs applications is promising in terms of parallelization, power consumption, scalability, reconfigurability, and high computing performance.

Graphene is a biocompatible material that can be incorporated safely into living tissue. This property makes graphene an ideal material for bioelectronics applications. The main obstacle for using graphene as a material for bioelectronic circuits is the lack of a bandgap, which results in noneffective current switching. Here, we use rectangular L-shaped graphene nanoribbons as a building block for graphene logic gates. Electrons are initially transported along the zigzag-edged nanoribbon and then the transport direction changes by 90°, resulting in transport along the armchair edge. Our computations showed that electron scattering because of this change in the direction causes the appearance of a pseudobandgap, which is large enough for logic operations. This pseudobandgap appears as a zero-conductance region for electron energies near the Fermi level. We propose an and , an or, and a not logic gate and use tight-binding Hamiltonians and nonequilibrium Greens functions to show that these designs can reproduce effectively the desired logic operations.

Bipolar resistive switching of the metal-insulator-semiconductor (MIS) capacitor-like structures with the inert Au top electrode and Si3N4 dielectric nanolayer (6 nm thick) has been investigated. The effect of highly doped n+-Si substrate is revealed related to the changes in semiconductor space charge region on the small-signal parameters of parallel and serial equivalent circuit models measured in the high- and low-resistive capacitor states, as well as under laser illumination. The increase in conductivity of semiconductor capacitor plate significantly reduces the charging and discharging times of capacitor-like structures.

A photovoltaic device based on plasma-etched silicon nanopillar (SiNP) arrays is demonstrated. Highly ordered, aligned and perpendicular to the substrate pure crystalline silicon nanopillars, that follow the axial p-n junction geometry, are fabricated by polystyrene colloidal particle self-assembly followed by cryogenic silicon plasma etching. The SiNPs surface electrical passivation by both methyl termination and hydrogen termination is examined and the encapsulation of the pillars by PMMA and transparent conductive oxide is demonstrated. The total reflectance (both specular and diffuse) of SiNP arrays of different period and diameter is measured. The total reflectance of silicon is reduced significantly in a wide range of the optical spectrum. Electrical characterization of bundles of nanowires was performed in terms of I-V measurements under light illumination. A short-circuit current density (Jsc) of 18.9mA/cm2, an open-circuit voltage (Voc) of 367mV and a fill factor (FF) of 0.59 were obtained on such axial p-n SiNP array photovoltaic devices. Display Omitted Si nanopillar fabrication by cryogenic plasma etching after colloidal lithographyAxial p-n junction Si nanopillar photovoltaic device fabricationStudy of electrical passivation, and demonstration of low reflectance.A fill factor of 0.59 was investigated for axial Si pillar PV device.Promising performance of the proposed recipe to fabricate next generation PV cells