1. Split-Voltage Configuration Improves Integrated Amplifier Power-Efficiency.
- Author
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Simmich, Sebastian and Rieger, Robert
- Subjects
ACTION potentials ,BIPOLAR transistors ,INTEGRATED circuits ,NOISE ,EARTHWORMS - Abstract
A split-voltage amplifier architecture is proposed which improves the power efficiency compared to a conventional implementation. The approach is verified with a prototype fabricated in 0.35 µm CMOS technology using lateral bipolar input transistors. It achieves a measured DC gain of 105 V/V, a differential AC gain of 40.3 dB with a bandwidth of 55 kHz, a CMRR of approximately 75 dB, and a PSRR of 55 dB. The input-referred noise is 7 nV/√Hz and 923 nVrms integrated from 100 Hz to 10 kHz, resulting in a Noise Efficiency Factor (NEF) of 2.84 and a Power Efficiency Factor (PEF) of 18.3. The split-voltage configuration improves power efficiency by nearly 25% compared to a full voltage supply and maintains a small area design. Action potentials of the medial and lateral giant fiber of an earthworm are recorded as an example application. [ABSTRACT FROM AUTHOR]
- Published
- 2024
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