1. Parallel Sphere Detector algorithm providing optimal MIMO detection on massively parallel architectures
- Author
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Universitat Politècnica de València. Departamento de Comunicaciones - Departament de Comunicacions, Universitat Politècnica de València. Departamento de Sistemas Informáticos y Computación - Departament de Sistemes Informàtics i Computació, Hungarian Government, Pázmány Péter Catholic University, Ministerio de Ciencia e Innovación, Jozsa, Csaba M, Kolumban, Geza, Vidal Maciá, Antonio Manuel, Martínez Zaldívar, Francisco José, González Salvador, Alberto, Universitat Politècnica de València. Departamento de Comunicaciones - Departament de Comunicacions, Universitat Politècnica de València. Departamento de Sistemas Informáticos y Computación - Departament de Sistemes Informàtics i Computació, Hungarian Government, Pázmány Péter Catholic University, Ministerio de Ciencia e Innovación, Jozsa, Csaba M, Kolumban, Geza, Vidal Maciá, Antonio Manuel, Martínez Zaldívar, Francisco José, and González Salvador, Alberto
- Abstract
Multiple-input multiple-output (MIMO) systems have attracted considerable attention in wireless communications because they offer a significant increase in data throughput and link coverage without additional bandwidth requirement or increased transmit power. The price that has to be paid is the increased complexity of hardware components and algorithms. The sphere detector (SD) algorithm solves the problem of maximum likelihood (ML) detection for MIMO channels by significantly reducing the search space of possible solutions. The main drawback of the SD algorithm is in its sequential nature, consequently, running it on massively parallel architectures (MPAs) is very inefficient. In order to overcome the drawbacks of the SD algorithm, a new parallel sphere detector (PSD) algorithm is proposed. It implements a novel hybrid tree search method, where the algorithm parallelism is assured by the efficient combination of depth-first search and breadth-first search algorithms. A path metric-based parallel sorting is employed at each intermediate stage. The PSD algorithm is able to adjust its memory requirements and extent of parallelism to fit a wide range of parallel architectures. Mapping details for MPAs are proposed by giving the details of thread dependent, highly parallel building blocks of the algorithm. Based on the building blocks proposed, a mapping to general-purpose graphics processing unit is provided, and its performance is evaluated. In order to achieve high-throughput, several levels of parallelism are introduced, and different scheduling strategies are considered. Copyright © 2015 John Wiley & Sons, Ltd.
- Published
- 2015