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Modern GPPs implement specialized instructions in the form of ISA extensions aiming to increase the performance of emerging applications. These extensions impose a significant overhead in the area and power of the processor because of their specific datapaths (e.g. hardware for SIMD and FP instructions may represent more than half of the core area). Considering that some devices (e.g., edge computing), must be as energy- and area-efficient as possible, and the sporadic usage of specialized instructions in many applications, we propose PHISA multicores. PHISA is composed of heterogeneous cores of the same single base ISA, but asymmetric functionality: some of the cores do not fully implement the costly instruction extensions, making room for the designers to add more efficient cores. We show that PHISA increases performance in (32%) and reduces energy consumption in (82%) compared to full-ISA systems with the same power budget, in multi-workload environments. • A heterogeneous multicore design composed of cores with partial-ISA implementation. • Partial-ISA replaces resource-expensive ISA extensions for extra core count. • Schedulers that keep execution transparency between full- and partial-ISA cores. • Evaluation in several different scenarios, configurations and optimization goals. • Partial-ISA shows better performance and energy efficient than traditional designs. [ABSTRACT FROM AUTHOR]