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20 results on '"Osman, Haris"'

1. Wafer reconstitution: embedded multi-die III-V and silicon co-integration platform

Author

Karve, Gauri, primary, Li, Yunlong, additional, Motsnyi, Vasyl, additional, Wei, Wei, additional, Visker, Jakob, additional, Chancerel, François, additional, Ackaert, Jan, additional, Puybaret, Renaud, additional, Dutta, Barundeb, additional, Sabuncuoglu Tezcan, Deniz, additional, Peng, Lan, additional, Soussan, Philippe, additional, Severi, Simone, additional, and Osman, Haris, additional

Published
2024
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2. Manufacturability of microLED on CMOS for Augmented Reality Glasses

Author

Steudel, Soeren Steudel, primary, Vertommen, Johan, additional, Boulbar, Emmanuel Le, additional, Buscemi, Giuseppe, additional, Bach, Lars, additional, Huylenbroeck, Stefaan Van, additional, Kang, Shuo, additional, Vos, Joeri De, additional, Miller, Andy, additional, Osman, Haris, additional, and Rebibis, Kenneth June, additional

Published
2023
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4. Wafer Level Pixelation of Colloidal Quantum Dot Image Sensors

Author

Li, Yunlong, primary, Karve, Gauri, additional, Malinowski, Pawel E., additional, Kim, Joo Hyoung, additional, Georgitzikis, Epimitheas, additional, Pejovic, Vladimir, additional, Lim, Myung-Jin, additional, Hagelsieb, Luis Moreno, additional, Puybaret, Renaud, additional, Lieberman, Itai, additional, Lee, Jiwon, additional, Cheyns, David, additional, Heremans, Paul, additional, Osman, Haris, additional, and Tezcan, Deniz Sabuncuoglu, additional

Published
2022
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5. 57‐3: MircoLED Display Integration on 300mm Advanced CMOS Platform

Author

Steudel, Soeren, primary, Vertommen, Johan, additional, Le Boulbar, Emmanuel, additional, Buscemi, Giuseppe, additional, Bach, Lars, additional, Van Huylenbroeck, Stefaan, additional, Arumugam, Hariharan, additional, La Tulipe, Douglas Charles, additional, De Vos, Joeri, additional, Miller, Andy, additional, Osman, Haris, additional, and Rebibis, Kenneth June, additional

Published
2022
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6. Wafer-scale 2.5D optics in the visible and near infrared for advanced light management

Author

Rottenberg, Xavier, primary, Marcon, Denis, additional, Jansen, Roelof, additional, Figeys, Bruno, additional, Lodewijks, Kristof, additional, De Proft, Anabel, additional, Helin, Philippe, additional, Rochus, Veronique, additional, Rolin, Cedric, additional, Storace, Eleonora, additional, Gehlhaar, Robert, additional, Genoe, Jan, additional, Osman, Haris, additional, Heremans, Paul, additional, Soussan, Philippe, additional, Saseendran, Sandeep, additional, Marinins, Aleksandrs, additional, Vereecke, Bart, additional, Pham, Nga, additional, and Tezcan, Deniz S., additional

Published
2021
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13. Poly-SiGe-Based MEMS Thin-Film Encapsulation

Author

Guo, Bin, primary, Wang, Bo, additional, Wen, Lianggong, additional, Helin, Philippe, additional, Claes, Gert, additional, De Coster, Jeroen, additional, Du Bois, Bert, additional, Verbist, Agnes, additional, Van Hoof, Rita, additional, Vereecke, Guy, additional, Haspeslagh, Luc, additional, Tilmans, Harrie A. C., additional, Decoutere, Stefaan, additional, Osman, Haris, additional, Puers, Robert, additional, De Wolf, Ingrid, additional, Tanaka, Shuji, additional, Severi, Simone, additional, and Witvrouw, Ann, additional

Published
2012
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14. Backside illuminated AlGaN-on-Si UV detectors integrated by high density flip-chip bonding

Author

Malinowski, Pawel E., primary, Duboz, Jean-Yves, additional, De Moor, Piet, additional, John, Joachim, additional, Minoglou, Kyriaki, additional, Srivastava, Puneet, additional, Abdul, Hameed, additional, Patel, Manojkumar, additional, Osman, Haris, additional, Semond, Fabrice, additional, Frayssinet, Eric, additional, Hochedez, Jean-Francois, additional, Giordanengo, Boris, additional, Van Hoof, Chris, additional, and Mertens, Robert, additional

Published
2011
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16. (Invited) SiGe MEMS Technology: A Platform Technology Enabling Different Demonstrators

Author

Witvrouw, Ann, primary, Van Hoof, Rita, additional, Bryce, George, additional, Du Bois, Bert, additional, Verbist, Agnes, additional, Severi, Simone, additional, Haspeslagh, Luc, additional, Osman, Haris, additional, De Coster, Jeroen, additional, Wen, Lianggong, additional, Puers, Robert, additional, Beernaert, Roel, additional, De Smet, Herbert, additional, Rudra, Sukumar, additional, and Van Thourhout, Dries, additional

Published
2010
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18. Detection, binning, and analysis of defects in a GaN-on-Si process for High Brightness Light Emitting Diode's.

Author

Halder, Sandip, Miller, Andy, Osman, Haris, Dutta, Barun, Mani, Antonio, Jones, Christopher, McCance, Syd, and Burkeen, Frank

Abstract

High Brightness Light Emitting Diode's (HB-LED's) have received considerable attention during the last few years due to their utilization in numerous consumer products (automotive, displays, etc.). Recently, one of the largest emerging markets for HB-LED's is the lighting industry because of its lower power requirements and longer lifetime. One of the key limitations for its universal consumer adoption is its higher cost. If the cost for production of an HB-LED is broken up into materials and process steps the price of the sapphire substrate is noticed to be significantly higher than all the individual process and material steps. In such a circumstance the key to making HB-LED's cheaper is by substrate engineering. Another aspect of the cost is the fact that the traditional sapphire substrates are usually 2 or 4 inches. Therefore, a logical step forward is to move to bigger substrates where yield can be higher. To make this a reality different groups have been working on alternative cheaper and larger substrates (Si/Glass). However, before any technology becomes mature numerous reliability and yield issues need to be fixed. As part of process optimization identifying killer defects is critical. In order to do so we use the Candela platform from KLA Tencor to monitor our epitaxial process. Since, silicon wafers are one of the most common substrates available it obviously emerged as a first choice. We at IMEC have developed a GaN on Si process for making HB-LED's on 200mm Si (111) substrates. The control of the first epitaxial layers on Si is the key to a successful HB-LED fabrication. Lattice mismatch and thermal coefficient mismatch often lead to wafer bow and defect propagation to the p-GaN surface which can be detrimental to the IQE (Internal Quantum Efficiency). The goal of this work is to understand the different types of defect and the nature of their origin on a typical HB LED stack as well as the detection capability of the tool. Typical defects detected are the cracks/hexagonal defects/pits and particles. Defect data will be analyzed in terms of compressive or tensile stress in the film. This paper focuses on un-optimized EPI wafers in terms of stress/defectivity and crystalline quality to help define the correct inspection thresholds. [ABSTRACT FROM PUBLISHER]

Published
2012
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19. Wafer bow of substrate transfer process for GaNLED on Si 8 inch.

Author

Pham, Nga P., Rosmeulen, Maarten, Bryce, George, Tezcan, Deniz S., Majeed, B., and Osman, Haris

Abstract

This paper investigates the wafer bow induced during the substrate transfer process for GaN LED on Si (111) 8 inch wafers. The substrate transfer process is to transfer the thin GaN LED device layer to a carrier wafer using a CuSnCu permanent bonding layer. The process generates tensile bow on a wafer due to the high tensile stress of the Cu or the CuxSny intermetallic layer after bonding. Understanding the wafer bow evolution during the substrate transfer is very important to get a good control of the process. The high wafer bow value may cause problems for some automatic handling tools in the production line or affect process quality such as in lithography. The influence of substrate thickness and Cu metallization thickness on the wafer bow has been studied. A bow compensation layer can be used to compensate the tensile bow, thus minimizing the wafer bow after the substrate transfer process. [ABSTRACT FROM PUBLISHER]

Published
2012
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20. Copper Oxide Direct Bonding of 200mm CMOS Wafers with Five Metal Levels and TSVs: Morphological and Electrical Characterization

Author

Cavaco, Celso, Peng, Lan, Lavizzari, Simone, Claes, Jesse, Hoovels, Nele V., Guerrieri, Stefano, Sabuncuoglu, Deniz, and, Tezcan, and Osman, Haris

Abstract

We report for the first time complete data on 200mm wafer to wafer aligned copper oxide direct bonding of wafers with five metal levels each with through-silicon-vias (TSVs) as backside connection. Both surface acoustic microscope (SAM) and cross-section scanning electron microscope (X-SEM) images taken across the bonded wafer pairs evidence the good bonding quality of the resulting interface. Kelvin structures and daisy chains with up to 2500 copper to copper bonded pads are shown to be connected successfully and its resistance value to match a target value.

Published
2016

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