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Frequency encoded reconfigurable logic gates OR and AND are designed using interferometric switch based on quantum dot semiconductor optical amplifier (QDSOA) and simulated using MATLAB for the first time as far as our knowledge goes. The amplitude modulation (AM) and quality factor ( Q fe ) are calculated using numerical simulations confirming practical feasibility of the logic gates. This paper also investigates the effect of amplified spontaneous emission (ASE) noise on AM, Q fe and signal-to-noise ratio (SNR) values. AM below 0.005 dB and Q fe more than 30 dB ensure error free operation of the logic gates. [ABSTRACT FROM AUTHOR]

The work describes design and simulations of a three input NAND gate using quantum dot semiconductor optical amplifiers for the first time as far as author's knowledge goes. Both cross gain modulation and cross phase modulations implement the NAND operation in a modified manner. Amplitude modulation, extinction ratio, relative eye opening, contrast ratio, etc. are optimized in terms of control power and their dependence on amplified spontaneous noise has been investigated for three different unsaturated gains of the QDSOA. These parameters show efficient performance for unsaturated gains 20 and 30 dB. REO value more than 99% and Q value more than 16 dB ensure practical feasibility of the logic gate proposed. [ABSTRACT FROM AUTHOR]

An on‐chip dual‐mode all‐optical multifunctional logic operation unit including four AND and two OR logic gates is proposed and experimentally demonstrated. It is realized using multiple intra‐mode four‐wave mixing (FWM) processes in a multimode silicon waveguide for 2 × 10 Gbit/s non‐return‐to‐zero on–off‐keying (NRZ‐OOK) mode‐division multiplexing signals. The AND logic operation is realized via the non‐degenerate FWM processes, and the OR logic operation is realized by overlapping the two degenerate FWM idlers in frequency domain via appropriately selecting the dual‐mode pump wavelength. The two OR and four AND logic sequences are verified with NRZ‐OOK sequences for both TE0 and TE1 modes. [ABSTRACT FROM AUTHOR]

In this paper, an all-optical XOR-AND gate operation has been proposed using one-dimensional periodic nonlinear material model. This structure consists of alternating layers of different nonlinear materials. In this design, we can obtain XOR and AND logical operation simultaneously at the reflected and transmitted port of the periodic structure. Numerical simulation has also been done using the finite-difference-time-domain (FDTD) method. The response time of this switching operation is picoseconds (ps) range order. We find low insertion loss (−3.01 dB), high contrast ratio (14.13 dB) and high extension ratio (10.93 dB) of this device. This design will be useful in future all-optical computing. [ABSTRACT FROM AUTHOR]

Tera hertz optical asymmetric demultiplexer (TOAD) using two semiconductor optical amplifiers and two control signals has been used to design an all optical parity checker and generator. The same circuit can generate and check both even and odd parity using a control input. The numerical simulation using Matlab 2007b is done for performance analysis of the proposed device in terms of output bit pattern, amplified spontaneous emission (ASE) noise, extinction ratio, contrast ratio, pseudo eye diagram, relative eye opening (98.9% for 20 dB gain and 96.21% for 10 dB gain) and their variation with input control pulse energy, amplified spontaneous emission noise factor for different unsaturated gain. The simulated value of E.R. = 81.39 dB, C.R. = 83.15 dB, REOP = 98.9% and Q value = 86.16 dB are found for this proposal. [ABSTRACT FROM AUTHOR]

Present communication deals with the design and analysis of all-optical NOR and NAND gates using Quantum dot Semiconductor Optical Amplifiers (QDSOA). The design uses no interferometer structure but cross gain modulation is utilized for operation. The structures are simple and simulations at a rate of 1 Tb/s are processed. For unsaturated gain 30 dB, the logic gates show high values of ER (29.82 dB, 16.93 dB), CR (29.6 dB, 21.33 dB), and Q (25.4 dB, 13.2 dB). This ensures practical feasibility and high quality of the proposed gates. [ABSTRACT FROM AUTHOR]

In the 5G era, more sensitive information will be transmitted on optical networks. Although modern cryptography could support different security mechanisms in different layers, the optical layer has not been paid enough attention but it is also vulnerable to attack by tapping or other methods. The optoelectronic firewall is one of the promising security strategies which can accelerate the operating speed within manageable costs by employing optical signal processing compared with current electronic firewalls. The most significant and challenging component of an optoelectronic firewall is pattern recognition. However, either the latest pattern recognition systems can only process the OOK or BPSK modulation format signals, or the coherent correlators supporting higher order modulation format require advanced components to deal with a higher number of symbols. In this paper, to address the pattern recognition challenges, we propose, analyze and simulate a pattern recognition system of QPSK signals integrated into all-optical high-speed optoelectronic firewalls used for optical layer security. The numerical simulation results first demonstrate the feasibility, and a baud rate of 100GBaud can be achieved. Next, a threshold-setting method is developed which also proves the ability to recognize arbitrary target patterns. Then some noise analysis results demonstrate that the pattern recognition of the I branch can be immune to the noise while the output power of EDFAs in the Q branch needs to be configured carefully. Finally, the matched result of a real Ethernet frame further reveals that our proposed system is promisingly applied in optoelectronic firewalls.

Nonlinear photonic crystal ring resonators are suitable mechanisms that can be used for designing optical logic gates and digital structures. In this paper, we designed two nonlinear resonant rings by adding doped glass rods inside the photonic crystal ring resonator. An optical half adder was designed using these nonlinear photonic crystal ring resonators. We used plane wave expansion and finite difference time domain methods to simulate our optical half adder. The simulations show that when one of the input ports is ON, the normalized optical power at the S is about 90 %. The time delay in this case is 7 ps. Also when both the input ports are ON, the normalized optical power at the C is about 155 %. The time delay in this case is 8 ps. [ABSTRACT FROM AUTHOR]

In this communication, we have introduced a new thought of designing all-optical binary and multivalued inverters using a single semiconductor optical amplifier (SOA) at a speed more than 300Gbps. The operation of this inverter is based on the nonlinear polarization rotation (NPR) effect in SOA. The quality factor (Q ~ 38.3 dB for binary, 46.6 dB for ternary and 41.5 dB for quaternary inverter), extinction ratio (ER ~ 43 dB for binary, 40 dB for ternary and 39 dB for quaternary inverter), contrast ratio (CR ~ 46.5 dB for binary, 46.5 dB for ternary and 45 dB for quaternary inverter), and relative eye penning (REO ~ 96% for binary inverter, 92% for ternary inverter, and 87% for quaternary inverter) have been calculated. The single-SOA inverter can solve the operational delay and noise-related problem of a design by reducing the hardware complexity. The circuit shows some useful values of Q factor (> 10 dB) and other performance-related matrices even in an ultra-high speed (100Gbps or more). [ABSTRACT FROM AUTHOR]

Feasibility of quantum dot semiconductor optical amplifier-based all-optical XNOR gate is theoretically simulated and demonstrated using Mach–Zehnder interferometer-based structure. Extinction ratio, contrast ratio, quality factors optimization suggests efficient performance of the gate. Optimized value of relative eye opening is 92.62%, and corresponding ER, CR and Q factor are 11.32 dB, 14.62 dB and 11.05 dB, respectively, which shows overall good performance of the gate. The effect of ASE noise is also investigated on the performance of the proposed gate which shows no significant effects. [ABSTRACT FROM AUTHOR]

Abstract The quantum Toffoli gate is one of the essential reversible universal logic gates widely used for optical data processing. Herein, a new scheme of developing all‐optical Toffoli gate using a two‐dimensional silicon–air photonic crystal is proposed. For the realization of the Toffoli gate, the principles of constructive and destructive interference of light are used. The Toffoli gate comprises two‐input–three‐output‐based optical AND gate, and a two‐input–one‐output optical XOR gate. Two Y junction power splitters have been used at the two inputs of the AND gate. The operating wavelength of the proposed Toffoli gate is 1550 nm along with the wafer size of 50 µm × 50 µm. The performance of the Toffoli gate has been analysed and simulated by the plane‐wave expansion method and finite‐difference time‐domain method. The response time and contrast ratios are also obtained from the simulation. The proposed Toffoli gate is intensity encoded with no non‐linear material within the crystal which shows significant improvement over other proposals.

Odd and even number detection is an important mathematical operation. Generally when any number is divisible by 2 then it is called an even number, otherwise, it is an odd number. Division by 2 can be easily obtained by putting a point before the least significant bit of any binary number. As an example a number (27)10 = (11011)2 when divided by 2 its result will be (1101.1)2 = (13.5)10. Hence when we find the fractional bit as logic-1 we can say that the number is odd, otherwise, it is even. This operation can be obtained by using a demultiplexer. Here we have developed an optical circuit that can divide any binary integer number by 2, apart from that its 1's complement can also be obtained from the circuit. Both of the results can be obtained simultaneously. Terahertz optical asymmetric demultiplexer based switch plays a very important role to design this n-bit circuit. Numerical simulations are done to find the performance of the circuit. [ABSTRACT FROM AUTHOR]

Abstract An all‐optical half adder based on two‐dimensional photonic crystals is proposed. The proposed structure is composed of a triangular array of dielectric rods made of non‐linear optical material in air. The structure consists of four waveguides and one ring resonator which are formed by removing a number of dielectric rods. The structure has been simulated and analysed by the plane wave expansion method and the finite‐difference time‐domain method. The size of the proposed structure is small with dimensions of 17 μm × 14.8 μm, and the material of the rods and lattice constant are uniform across the structure. The proposed half adder has a minimum contrast ratio of 13.51 dB in the steady state, with a maximum time delay of 2 ps.

Abstract Quantum logic gate operates on a number of qubits, where a controlled Z gate operates on two qubit data. Similarly, the square root of controlled Z (SRCZ) operates also on two qubit data. The SRCZ gate is very much advantageous in quantum computing. Different quantum gates are implemented by using the physical properties of light such as phase, polarization, intensity, and frequency. Here, the authors propose a photonic scheme for implementing quantum SRCZ logic gate using phase as well as intensity encoding. The non‐linear property of Pockels material with proper external biasing voltage is used to develop the scheme.

In this article, simple models of optical computing circuits ( 1 × 4 demultiplexer (DEMUX), 4 × 1 multiplexer (MUX), Boolean logic, and half-adder (HA)) are shown with mechanically controlled plane mirrors. Photographs of the proposed computational circuits are also shown. It is very useful for the school student to understand optical logic and Boolean algebra. It also shows that, computation can be possible with simple plane mirrors placed on the table. Here mirror movements are done with hand. The principle of operation of the circuits is based on reflection of light from plane mirrors. Optical devices which are used in this activity are all low-cost materials. [ABSTRACT FROM AUTHOR]

All-optical XOR gate based on quantum dot semiconductor optical amplifier is proposed and analyzed without using Mach–Zehnder interferometer (MZI) structure at a rate of 2 Tb/s. Low control power and high-speed logic gates with extinction ratio more than 15 dB, contrast ratio 20 dB and amplitude modulation 0.03 dB are described with pseudoeye diagrams. A high quality factor (Q ~ 68) is obtained which ensures negligible bit error rate (BER). Relative eye opening (REO) more than 97% is reported for 20 dB small signal gain. The effect of amplified spontaneous emission noise is also investigated. [ABSTRACT FROM AUTHOR]

All optical majority gate is an optical logic structure with three input and one output ports. In this paper we designed an optical majority gate using a nonlinear resonant cavity based on photonic crystals. Plane wave expansion and finite difference time domain methods were used for calculating the band structure diagram and optical behavior of the optical majority gate, respectively. The proposed structure is ON, when two or three input ports are ON. The maximum time delay of our majority gate is about 5 ps. [ABSTRACT FROM AUTHOR]

Due to the demand of high computational speed for processing big data that requires complex data manipulations in a timely manner, the need for extending classical logic to construct new multi-valued optical models becomes a challenging and promising research area. This paper establishes a novel octal-valued logic design model with new optical gates construction based on the hypothesis of Light Color State Model to provide an efficient solution to the limitations of computational processing inherent in the electronics computing. We provide new mathematical definitions for both of the binary OR function and the PLUS operation in multi valued logic that is used as the basis of novel construction for the optical full adder model. Four case studies were used to assure the validity of the proposed adder. These cases proved that the proposed optical 8-valued logic models provide significantly more information to be packed within a single bit and therefore the abilities of data representation and processing is increased. [ABSTRACT FROM AUTHOR]

All optical logic gates can play very important roles in all optical digital systems. In this paper we designed an all optical XNOR gate. The switching part of the designed XNOR consists of two nonlinear resonant cavities. The nonlinear cavities were created by adding two nonlinear defects made of doped glass. Plane wave expansion and finite difference time domain methods were used for simulating the designed structure. The final structure has two input and one output ports. The output port is ON when the input ports have similar states. For the designed structure the delay time is about 2.5 ps. [ABSTRACT FROM AUTHOR]

In this Letter, the authors designed a photonic configurable logic block (pCLB) with 1×1 Mach–Zehnder modulator as a universal photonic gate (UPG) using electro‐optic mechanism. The UPG is capable of performing all the logical operations with the help of FPGA as a configuration controller. The functionality and its suitability is verified by forming a pCLB of ten UPGs, which finds applications in digital photonics. For the design of pCLB, traditional electronic design automation tools are used. The pCLB provides features namely scalability and modular approach, for the reconfigurable digital photonic integrated circuits. The photonic gate designed using a two‐dimensional finite difference time domain approach shows a crosstalk‐free operation with a negligible transmission loss of 0.18 dB and flexible switching control compared to the existing 2×2 MZI‐based photonic gate. [ABSTRACT FROM AUTHOR]

A new device architecture of an all‐optical logic inverter (AOLI) has been proposed in this study. The AOLI functions based on stimulated Raman scattering (SRS) in silicon nanocrystal embedded slotted photonic crystal waveguide (SPCW). The operating power and footprint size of the proposed device have significantly been scaled down to ∼1.5 mW and ∼8.5×42μm2, respectively, by combining the benefits of giant SRS gain of silicon nanocrystal and ultra‐high spatio‐temporal confinement of the SPCW. Cascadability of the proposed AOLI has been investigated using the maximum product criterion of the noise margin. The successful operation of the AOLI has been demonstrated for the repetition rate of the pulses as high as 100 Gbps. Finally, tolerance of performance of the design under different types of fabrication imperfections has also been calculated to establish its sustainability in a practical scenario. [ABSTRACT FROM AUTHOR]

In this study, an InAs channel‐based triple gate spin‐field effect transistor (FET) model is proposed. The proposed triple‐gate spin‐FET offers a high density of integration, consumes low power and offers very high switching speed. By incorporating the suitable parameters like channel length, spin diffusion length, channel resistance and junction polarisation, the modelled triple gate spin‐FET is then used to implement 3‐input XOR, 3‐input XNOR and majority gate functions. The designs of 3‐input XOR and majority gates were achieved keeping in view that the sum operation of a 1‐bit full adder is obtained through XOR gate and the carry operation of 1‐bit full adder is obtained through majority gate. Therefore, for designing a 1‐bit full adder, only two spin‐FETs will be required which signifies the compact nature of the design. In addition, a 2‐bit ripple adder is designed with cascading two 1‐bit full‐adders. Finally, a comparative analysis of the proposed gates and 1‐bit full adder with the reported work and conventional CMOS design was carried out in terms of employed number of devices, power consumption and speed. The analysis shows that proposed gates/adder offer better performance than the reported work and conventional CMOS designs. [ABSTRACT FROM AUTHOR]

The concept and analysis of a nano‐scale multifunctional logic gate based on graphene/hexagonal boron nitride (h‐BN) plasmonic waveguides at a wavelength of 7.5µm are presented. By using graphene as a metamaterial with outstanding electro‐optical properties, various logical operations including AND, OR, and XOR are implemented. The proposed multifunctional structure supports surface plasmons (SPs) whose dispersion properties can be controlled by applying an electrical field to graphene. The effects of the incident polarisation and the substrate of graphene on the transmission of SPs are investigated. Simulations by finite difference time domain method show that the extinction ratios for the presented logical operations are higher than 15dB. Also, the structure has a compact footprint of 1.12µm2 which is suitable for using in integrated photonic circuits. This provides a path for the development of novel nano‐scale practical on‐chip applications such as plasmonic memory devices. [ABSTRACT FROM AUTHOR]

This study has given the investigation for achievable net coding gain (NCG) of optical forward error correction (FEC) coding scheme with convolutional code to control the received sensitivity following a required signal‐to‐noise ratio in the communication channel. The achievable NCG is obtained from the difference between the upper bound NCG and the power penalty of the optical exclusive‐OR (XOR) gate, which is based on a four‐wave mixing in highly non‐linear fibre. The upper bound NCG was analytically derived by calculating error probability of optimal convolutional code, and the power penalty was numerically derived by comparing bit‐error rates between with and without the optical FEC coding. To confirm the feasibility for achieving the highest NCG, the optimal operating condition of the optical XOR gate is experimentally evaluated to minimise their power penalty. A 0.5 dB power penalty was obtained at BER=10−9 under the optimised condition with 223−1 pseudo‐random binary sequence differential phase‐shift keying‐modulated return to zero signal at 10 Gbps. [ABSTRACT FROM AUTHOR]

Hybrid encoding technique for the representation of the binary states of information, four-wave mixing in semiconductor optical amplifier (SOA) as frequency generator and cross-polarization rotation effect in semiconductor optical amplifier as a frequency converter are used to design all-optical universal logic gate NAND. The devices can perform ultrafast operation and easily integrable. The simulated results of the proposed logic gate ensure feasibility of the proposals. [ABSTRACT FROM AUTHOR]

A new design of 1‐to‐2 line all‐optical logic decoder has been proposed based on a two‐dimensional photonic crystal (PhC) structure. The decoder operates based on the principle of optical interference within the PhC waveguides. An optical bias has been used to generate high‐logic states at zero input conditions. Simulations explore a high contrast ratio, in the order of 11.3 dB, for both the output ports of the device. Response times have been calculated from the transient responses of the output ports, and are found as 0.65 and 0.77 ps for the ports 1 and 2, respectively. These results in a bit rate of ≃625 Gbps, considering the worst‐case scenario. Phase sensitivity analysis has also been performed which shows that the device output is quite sensitive to the differences in phases of the bias and signals. However, a strategy has been proposed to make the same insensitive to the phase changes. Finally, the small footprint (in the order of 234 μm2); standard operating wavelength; and silicon‐based design of the decoder, along with its said merits, make the device highly potential for on‐chip photonic‐integrated‐circuit applications. [ABSTRACT FROM AUTHOR]

Using a two‐dimensional photonic crystal lattice, a compact and simple structure has been introduced in the present study to construct an all‐optical half adder. The designed structure operates under the interference effect. The phase difference has been created in different states by putting the point defects and the difference in the length of the input waveguides. To do analyses, the finite‐difference time‐domain method and the plane wave expansion have been used. The advantages of this design include the small dimensions, high possibility of construction, compatibility with the silicon‐based technology, and equality of the output power in the logic states 0 and 1. The contrast ratio calculated for the port Sum and the port Carry has been equal to 9.3 and 8.22 dB. The response time has been equal to 0.22 ps, generating the data transfer rate of 4.55 Tbps. [ABSTRACT FROM AUTHOR]

In this paper, we proposed a structure to realize an all-optical digital multiplexer. The proposed structure had two inputs, one control and one output port. Using the control port, one can decide which input port can be connected to the output port. The proposed structure consisted of two nonlinear photonic crystal ring resonators, L-shaped and T-shaped, and a straight waveguide. Total footprint and maximum delay time of the proposed structure were 479 μm2 and 3 ps, respectively. [ABSTRACT FROM AUTHOR]

The effect of two-photon absorption (TPA) on all-optical logic operation in quantum-dot semiconductor optical amplifier (QD-SOA) has been carried out. We model the rate equation with the TPA effect for the logic XOR gate, AND gate, and, for pseudo-random bit sequence (PRBS) generation. The simulated results indicate that the TPA induced pumping increases the output Q-factor (quality). The results show that the quality of the output depends on the input pulse width and the speed of operation. The PRBS system can operate at 250 and 320 Gb/s but an increase in pulse width decreases the output Q-factor. [ABSTRACT FROM AUTHOR]

An impedance matching theory‐based methodology is presented in this study for designing/optimising photonic crystal‐based all‐optical AND gate. A basic architecture for the AND gate is projected first, and thereafter the same is optimised utilising the proposed methodology. Performance of the AND gate is evaluated based on several metrics that are calculated using a finite‐difference‐time‐domain simulation. The optimised AND gate has exhibited a high extinction ratio in the order of 6.9 dB, within a very small footprint of ≈110μm2. It also supports propagation of a high bit rate (≈1 Tb/S) and has a wide operational bandwidth (≈4 THz), which make the device suitable for different photonic integrated circuit applications. [ABSTRACT FROM AUTHOR]

Adding nonlinear rods to photonic crystal ring resonators is a common way used for designing all-optical logic gates. In this paper, we will use the same method for designing an all-optical Galois field adder. The proposed structure can be realized by parallel combination of four optical XOR gates; therefore, for realizing the proposed structure, we designed the basic XOR gate then created the final structure by combining four XOR gates. [ABSTRACT FROM AUTHOR]

In this study, a small size, low power, simple and high contrast ratio (CR) structure was designed and simulated to use in photonic crystal‐based all‐optical logic gates. This structure can be used for both all‐optical logic NOT and XOR gates. The suggested structure is composed of three waveguides and a nano‐resonator. The nano‐resonator was designed by removing two dielectric rods. For use as an optical NOT logic gate, one of the input ports enters the control signal. In this case, the CR between logic levels '0' and '1' is 20.53 dB, which is higher than that of the provided gates based on structures published recently. The CR for the XOR gate is 19.95 dB. The response time to the input signal of the designed gate is 0.466 ps. The simplicity of the structure, small size, and high CR are the advantages of this structure compared to previously provided logic gates. The results have proven a superior prospect for the proposed structure to use in all optical integrated circuits. [ABSTRACT FROM AUTHOR]

Pauli‐Y type of quantum gate is a significant name in the logic family of quantum gates, as this gate deals with complex qubits. It has many significant applications in quantum computing. In this study, the authors propose a new method of generation of Pauli‐Y gate by the proper uses of optical polarisation encoding and phase encoding jointly. This quantum gate can be implemented by dibit and tribit mechanisms instead of single qubit system, where tribit‐based system deals with the high degree of error sensitivity. [ABSTRACT FROM AUTHOR]

We propose a scheme to realize all-optical logic operation in quantum-dot semiconductor optical amplifier (QD-SOA) based Mach-Zehnder interferometer (MZI) considering the effects of two-photon absorption (TPA). During propagation of sub-picosecond pulses in QD-SOA, TPA leads to an additional change in carrier recovery dynamics in quantum-dots. We utilize a rate equation model to take into account carrier refill through TPA and nonlinear dynamics including carrier heating and spectral hole burning in the QD-SOA. The simulation results show the TPA induced pumping in the QD-SOA can reduce the pattern effect and increase the output quality of the all-optical logic operation. With TPA, this scheme is suitable for high speed Boolean logic operation at 320 Gb/s. [ABSTRACT FROM AUTHOR]

We investigate all-optical logic operation in quantum-dot semiconductor optical amplifier (QD-SOA) based Mach–Zehnder interferometer considering the effects of two-photon absorption (TPA). TPA occurs during the propagation of sub-picosecond pulses in QD-SOA, which leads to a change in carrier recovery dynamics in quantum-dots. We utilize a rate equation model to take into account carrier refill through TPA and nonlinear dynamics including carrier heating and spectral hole burning in the QD-SOA. The simulation results show the TPA-induced pumping in the QD-SOA can reduce the pattern effect and increase the output quality of the all-optical logic operation. With TPA, this scheme is suitable for high-speed Boolean logic operation at 320 Gb/s. [ABSTRACT FROM AUTHOR]

In the F5G era, a promising all-optical processing technology named all-optical pattern recognition has attracted more and more attention. Its applications include not only all-optical header recognition or address recognition in OCDMA but also optoelectronic firewalls. The higher the recognition rate of pattern recognition, the higher the processing rate of both applications can reach. To meet the development features of eFFB in F5G, high-speed all-optical pattern recognition should be achieved. In this paper, a QPSK all-optical pattern recognition system with a data rate of up to 84Gbps is proposed, analyzed, and experimentally demonstrated by employing commercial independent optical components. The system first converts the I branch of the input QPSK signal to a positive and a negative IM signal by adding the coherent carrier from the orthogonal polarization. Then the converted IM signals are coupled into time delay lines and optical AND logic gates implemented by HNLFs to achieve the optical correlation operation. In the end, a high-level optical pulse indicating the pattern recognized result is output. Numerical simulation results reveal that the proposed system can recognize the target sequence from the I branch of the input sequence and the position of the output high-level pulse in the time window of the I branch of the input sequence is the position of the last symbol of the target sequence. The results of the experiment demonstrate that the proposed system can recognize a 4-symbol target sequence from the I branch of an 8-symbol 84Gbps QPSK input sequence, which proves the all-optical pattern recognition of QPSK signals. • An 84Gbps QPSK all-optical pattern recognition system is proposed and demonstrated. • The operating principle is analyzed by simplifying the Jones matrix and approximately solving the Coupled Amplitude Equations of Four-Wave Mixing. • The system can recognize the target pattern from the input QPSK signal and the position of the output high-level pulse coincides with the last symbol of the target sequence from the simulation results. • The experimental results demonstrate that the system can recognize a 4-symbol target pattern from an 8-symbol input sequence of the I branch of the input 84Gbps QPSK signal. [ABSTRACT FROM AUTHOR]

Modern electronics are developing electronic-optical integrated circuits, while their electronic backbone, e.g. field-effect transistors (FETs), remains the same. However, further FET down scaling is facing physical and technical challenges. A light-effect transistor (LET) offers electronic-optical hybridization at the component level, which can continue Moore’s law to quantum region without requiring a FET’s fabrication complexity, e.g. physical gate and doping, by employing optical gating and photoconductivity. Multiple independent gates are therefore readily realized to achieve unique functionalities without increasing chip space. Here we report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs show output and transfer characteristics resembling advanced FETs, e.g. on/off ratios up to ~1.0x106 with a source-drain voltage of ~1.43 V, gate-power of ~260 nW, and subthreshold swing of ~0.3 nW/decade (excluding losses). Our work offers new electronic-optical integration strategies and electronic and optical computing approaches.