1. Deep learning acceleration in 14nm CMOS compatible ReRAM array: device, material and algorithm co-optimization
- Author
-
Gong, N., primary, Rasch, M.J., additional, Seo, S.-C., additional, Gasasira, A., additional, Solomon, P., additional, Bragaglia, V., additional, Consiglio, S., additional, Higuchi, H., additional, Park, C., additional, Brew, K., additional, Jamison, P., additional, Catano, C., additional, Saraf, I., additional, Athena, F.F., additional, Silvestre, C., additional, Liu, X., additional, Khan, B., additional, Jain, N., additional, Mcdermott, S., additional, Johnson, R., additional, Estrada-Raygoza, I., additional, Li, J., additional, Gokmen, T., additional, Li, N., additional, Pujari, R., additional, Carta, F., additional, Miyazoe, H., additional, Frank, M.M., additional, Koty, D., additional, Yang, Q., additional, Clark, R., additional, Tapily, K., additional, Wajda, C., additional, Mosden, A., additional, Shearer, J., additional, Metz, A., additional, Teehan, S., additional, Saulnier, N., additional, Offrein, B. J., additional, Tsunomura, T., additional, Leusink, G., additional, Narayanan, V., additional, and Ando, T., additional
- Published
- 2022
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