Search

The continuous wave laser-induced damage thresholds of Schott chalcogenide glasses, IRG-24, IRG-25, and IRG-26, are measured for a 5s exposure of 1.07 μm light focused to a spot size with 1/e2 diameter of 830 μm, following the International Organization for Standardization standards.

Organometallic iridium(III) complexes have seen widespread use over the past two decades, particularly as phosphorescent dopants in organic light emitting diodes (OLEDs) due to their large spin-orbit coupling and metal-toligand charge transfer (MLCT) excited states. Interest in the non-linear optical (NLO) applications of these materials has increased recently with reports of both two-photon absorption (2PA) and reverse saturable absorption (RSA). A family of materials of the form [IrIII(NO2piq)2(acac)] were synthesized and characterized, where acac is acetylacetonate and NO2piq is a nitrophenylisoquinoline ligand. In order to assess structure-property relationships for the photophysics of these complexes, the placement of the nitro group was altered on the phenyl ring. Systematic control over the maxima of the absorption and photoluminescence bands attributed to the MLCT excited states was achieved through the ligand variation. The photophysical properties of this family of materials are discussed in detail and include their linear absorption spectra, photoluminescence measurements at 298 and 77K, excited state lifetimes, and CIE color chromaticity coordinates.

Nonlinear refraction coefficients are measured via the Z-scan technique in the mid-infrared spectral region for infrared transmitting materials. Harmonic and supercontinuum generation are modeled using the experimentally obtained values and compared to experimental observations.

We utilize the conventional Z-scan technique to provide absolute measurements of third-order nonlinear refraction coefficients (n2) in the mid-wave infrared at 2 µm and 3.9 µm of common optical materials that have transparency windows spanning this regime. We study a variety of narrow band gap and wide band gap semiconductors, fluoride crystals (BaF2, CaF2, LiF, and MgF2) and optical glasses, and a series of chalcogenide glasses. The n2 is found to span on the order of ∼10−15 to ∼10−12 cm2/W for the semiconductors, ∼10−16 cm2/W for the fluoride crystals and glasses, and ∼10−14 to ∼10−13 cm2/W for the chalcogenides. The experimental results are compared to previous measurements of n2 conducted in the visible and near-infrared along with empirical and theoretical formulations.

We have acquired 3-D biometric images using digital holography. This was accomplished using eyesafe (~1550 nm) telecom fiber lasers at two wavelengths. The two images were aligned, with respect to phase, and then subtracted to obtain a wrapped image. The wrapped image is then further processed to reduce noise that interferes with the unwrapping process. Some example biometric images are presented.

A symmetric gain optoelectronic mixer based on an indium gallium arsenide (In0.53Ga0.47As)/indium phosphide (InP) symmetric heterojunction phototransistor structure is being investigated for chirped-AM laser detection and ranging (LADAR) systems operating in the “eye-safe” 1.55 μm wavelength range. Signal processing of a chirped-AM LADAR system is simplified if the photodetector in the receiver is used as an optoelectronic mixer (OEM). Adding gain to the OEM allows the following transimpedance amplifier’s gain to be reduced, increasing bandwidth and improving the system’s noise performance. A symmetric gain optoelectronic mixer based on a symmetric phototransistor structure using an indium gallium arsenide narrow bandgap base and indium phosphide emitter/collector layers is proposed. The devices are simulated with the Synopsis TCAD Sentaurus tools. The effects of base–emitter interface layers, base thickness and the doping densities of the base and emitters on the device performance are investigated. AC and DC simulation results are compared with a device model. Improved responsivity and lower dark current are predicted for the optimized InGaAs/InP device over previously reported devices with indium aluminum arsenide emitter/collector layers.

This paper explores the problem of efficiently ordering interprocessor communication (IPC) operations in statically scheduled multiprocessors for iterative dataflow graphs. In most digital signal processing (DSP) applications, the throughput of the system is significantly affected by communication costs. By explicitly modeling these costs within an effective graph-theoretic analysis framework, we show that ordered transaction schedules can significantly outperform self-timed schedules even when synchronization costs are low. However, we also show that when communication latencies are nonnegligible, finding an optimal transaction order given a static schedule is an NP-complete problem, and that this intractability holds both under iterative and noniterative execution. We develop new heuristics for finding efficient transaction orders, and perform an extensive experimental comparison to gauge the performance of these heuristics.

As transistor sizes shrink, interconnects represent an increasing bottleneck for chip designers. Several groups are developing new interconnection methods and system architectures to cope with this trend. New architectures require new methods for high-level application mapping and hardware/software codesign. We present high-level scheduling and interconnect topology synthesis techniques for embedded multiprocessor systems-on-chip that are streamlined for one or more digital signal processing applications. That is, we seek to synthesize an application-specific interconnect topology. We show that flexible interconnect topologies utilizing low-hop communication between processors offer advantages for reduced power and latency. We show that existing multiprocessor scheduling algorithms can deadlock if the topology graph is not strongly connected, or if a constraint is imposed on the maximum number of hops allowed for communication. We detail an efficient algorithm that can be used in conjunction with existing scheduling algorithms for avoiding this deadlock. We show that it is advantageous to perform application scheduling and interconnect synthesis jointly, and present a probabilistic scheduling/interconnect algorithm that utilizes graph isomorphism to pare the design space.

Application-specific, parameterized local search algorithms (PLSAs), in which optimization accuracy can be traded off with run time, arise naturally in many optimization contexts. We introduce a novel approach, called simulated heating, for systematically integrating parameterized local search into evolutionary algorithms (EAs). Using the framework of simulated heating, we investigate both static and dynamic strategies for systematically managing the tradeoff between PLSA accuracy and optimization effort. Our goal is to achieve maximum solution quality within a fixed optimization time budget. We show that the simulated heating technique better utilizes the given optimization time resources than standard hybrid methods that employ fixed parameters, and that the technique is less sensitive to these parameter settings. We apply this framework to three different optimization problems, compare our results to the standard hybrid methods, and show quantitatively that careful management of this tradeoff is necessary to achieve the full potential of an EA/PLSA combination.

Self-timed scheduling is an attractive implementation style for multiprocessor DSP systems due to its ability to exploit predictability in application behavior, its avoidanceof over-constrained synchronization, and its simplified clocking requirements.However, analysis and optimization of self-timed systems under real-time constraintsis challenging due to the complex, irregular dynamics of self-timed operation.In this paper, we review a number of high-level intermediate representationsfor compiling dataflow programs onto self-timed DSP platforms, including representationsfor modeling the placement of interprocessor communication (IPC) operations;separating synchronization from data transfer during IPC; modeling and optimizinglinear orderings of communication operations; performing accurate design spaceexploration under communication resource contention; and exploring alternativeprocessor assignments during the synthesis process. We review the structureof these representations, and discuss efficient techniques that operate onthem to streamline scheduling, communication synthesis, and power managementof multiprocessor DSP implementations.

Ternaries and quaternaries of ZnCd(Mg)Se can be grown lattice-matched to InP substrates with band gaps spanning most of the visible range, having potential applications as visible light emitters. The quality of these materials is very sensitive to the surface preparation of InP substrates and the initiation of growth. In this paper, we report the details of the growth initiation of ZnCdSe epilayers on InP substrates. The composition of ternary alloy, and thus the lattice-mismatch to InP, was controlled by adjusting the Zn and Cd fluxes. A fast substrate deoxidation, followed by initial low-temperature growth results in two-dimensional growth and substantial improvements of ZnCdSe epilayers. These results along with observations on the use of InGaAs and InP buffer layers indicate that control of the interface chemistry is essential to obtain high-quality materials.

We report the molecular beam epitaxial (MBE) growth of lattice-matched Zn x Cd y Mg 1− x − y Se quaternaries on InP substrates having a wide range of band gaps. The composition and, thus, band gap and lattice constant, can be accurately controlled by adjusting the group II fluxes. By optimizing the growth condition and incorporating of a III–V buffer layer, we have grown very high-quality quaternary layers. Our best lattice-matched samples exhibit double crystal X-ray rocking curves with full-width-at-half-maximum (FWHM) about 460 arcsec and photoluminescence line widths about 60 meV at 77 K for a band gap of 2.8 eV. These materials can be used for the fabrication of lattice-matched semiconductor lasers that can emit throughout most of the visible range, from yellow to blue.

We describe a phase unwrapping algorithm for digital holographic images. The algorithm uses preprocess smoothing, phase gradient calculations, and amplitude measures to determine the reliability of a given data point, and follows a non-continuous path.

Very low defect density ZnSe epilayers on GaAs substrates have been grown by metal-organic chemical vapor deposition (MOCVD) and the layers were characterized by various techniques. ZnSe epilayers were grown using diethylzinc (DEZn) and diethylselenide (DESe) as source materials. Growth studies were done at 400 °C under a Se-started growth condition in an atmospheric pressure MOCVD reactor. Different GaAs substrates were used to study the effect of substrates on the ZnSe quality. The as-grown ZnSe epilayers were characterized by double crystal X-ray diffraction, transmission electron microscopy (TEM), and scanning electron microscopy. The results show excellent surface morphology and crystal quality for ZnSe. The best material was grown on undoped GaAs. A full-width-at-half-maximum (FWHM) of the ZnSe (≈0.2 μ m thick) X-ray peak as low as 90 arc s was achieved. TEM results show that ZnSe epilayers grown on undoped GaAs have a very low stacking fault density and a large spacing between misfit dislocations. The density of the stacking faults is less than 10 5 cm – , which is more than three orders of magnitude lower than that of samples grown by conventional molecular beam epitaxy [J. Petruzzello et al., J. Appl. Phys. , 63 (1988) 2299] and MOCVD [J.L. Batstone et al., Philos. Mag. A , 66 (1992) 609], The spacing between misfit dislocations is between 5 and 10 μ m, which is 10–20 times that of reported samples of comparable thickness.

Uncooled mid-infrared photoconductors are used in situations where hot objects (such as fire, explosions, engines, etc.) need to be detected using compact, low-cost systems. We have experienced trouble obtaining reliable detector data from mid-infrared photoconductor vendors. The purpose of this report is to give a detailed discussion of how to characterize the signal and noise properties of photodetectors with an emphasis on avoiding the measurement pitfalls associated specifically with room temperature and near room temperature mid-infrared photoconductors. The report ends with a discussion of where it is appropriate to use a commonly used figure of merit.

This work describes a method for eliminating the mathematical ambiguity in the phase map for digital holographic images. The technique uses a pre-processing step to smooth the amplitude data and reduce noise in the phase data. The unwrapping algorithm uses both phase gradient calculations and an amplitude measure to determine the reliability of a given data point, and uses a non-continuous path following approach.

Optical modulators are a key element of optical data communication systems. All modulators demonstrated to date rely on the free-carrier plasma dispersion effect. This method absorbs light, which changes the material's index of refraction. This absorption requires carrier transport and, in present implementations, suffers from slow minority carrier diffusion. Reducing the active thickness over which the carriers must diffuse in an attempt to improve speed reduces the strength of the effect, trading efficiency for speed. Here we investigate an entirely new type of silicon electro-optic modulator that does not have any of these trade-offs. It utilizes the Kerr induced refractive index change in silicon nanocrystals, which has been reported to be large (5E-17cm2/W) [1]. The proposed microdisk resonator modulator is shown in Figure 1. An oxide layer (grey) separates the active device layers from the silicon Si substrate (green). Light enters the waveguide on the right and is alternately exchanged between the microdisk resonator and the output of the waveguide. Figure 1 shows an estimate of the expected refractive index change versus applied voltage. An index change of ∼2 × 10−4 is enough to modulate the light, corresponding to a voltage of only 0.5–1.5 V. Confinement of light in the waveguide and microdisk is accomplished via a slot waveguide design. Speeds of more than 100Gbit/s are possible with this design.

Here we report direct observation of DC Kerr electro-optic modulation using silicon nanocrystals. The enhanced DC Kerr effect could enable ultrafast CMOS compatible electro-optic modulators.

Optoelectronic mixing devices mix a modulated optical signal with a reference electrical signal to obtain an electrical low frequency difference signal. These devices are particularly attractive for chirped-FM laser detection and ranging (LADAR) systems. The Army Research Laboratory (ARL) has been developing chirped-FM LADAR systems for applications such as reconnaissance, terrain mapping, force protection, facial recognition, robotic navigation and weapons fuzing [1]. Signal processing of a chirped-FM LADAR system is simplified if the photodetector in the receiver is used as an optoelectronic mixer (OEM). While a DC biased phototransistor can be used as an optoelectronic mixer [2], a symmetric I–V characteristic photodetector allows driving the OEM directly with the local oscillator (LO) signal, without a DC bias [3]. Sensitivity to background light is reduced, as the response from background light averages to zero. An additional 3 dB signal processing gain is also obtained. As the OEM output is the low frequency difference signal, the gain of the following transimpedance amplifier (TZA) can be increased, improving LADAR performance. ARL has previously demonstrated chirped FM LADAR systems with GaAs and InGaAs metal-semiconductor-metal (MSM) Schottky photodetector OEMs for operation at the 800 nm and 1550 nm wavelengths [3,4]. A symmetric photodetector with gain would improve overall system performance, while preserving the advantages offered by MSM OEM devices. We previously reported on symmetric gain optoelectronic mixers based on a symmetric heterojunction phototransistor using In 0.52 Al 0.48 As/ In 0.53 Ga 0.47 As heterostructures [5]. In this work, the In 0.52 Al 0.48 As wide bandgap layers are replaced with InP to improve thin film growth quality and device performance.

Particle filtering methods provide powerful techniques for solving non-linear state-estimation problems, and are applied to a variety of application areas in signal processing. Because of their vast computational complexity, real-time hardware implementation of particle-filter-based systems is a challenging task. However, many particle filter applications share common characteristics, and the same system design can be reused with appropriate streamlining. To achieve this, a parameterized design framework for particle filters is proposed in this paper. In this framework, parameterization of system features that vary over specific implementations enables reuse of a generic design for a wide range of applications with minimal re-design effort. Using this framework, we explore different design options for implementing two different particle filtering applications on field-programmable gate arrays (FPGAs), and we present associated results on trade-offs between area (FPGA resource requirements) and execution speed.

We have grown ZnCdSe/ZnCdMgSe quantum well (QW) structures nearly lattice matched to InP substrates. Emission energies from 2.307 to 2.960 eV were measured by low‐temperature photoluminescence at 10 K for samples with QW thicknesses between 5 and 80 A. By using exactly lattice‐matched QWs, the lower limit of the energy range can be lowered to about 2.2 eV (at 10 K). We propose that these structures could be used in entirely lattice‐matched semiconductor lasers operating at room temperature in the blue, green, and yellow regions. Because of the absence of strain, these materials are expected to be less prone to degradation than the current blue‐green lasers grown on GaAs.

This paper addresses some fundamental issues relating to the design of systems on chip that utilize optical interconnects. We present an information theoretical model for assessing trade-offs between global and local partitions in these systems, and evaluate interconnect topology synthesis and application mapping techniques for digital signal processing (DSP) applications in these systems.

Application-specific, parameterized local search algorithms (PLSAs), in which optimization accuracy can be traded off with run-time, arise naturally in many optimization contexts. We introduce a novel approach, called simulated heating, for systematically integrating parameterized local search into evolutionary algorithms (EAs). Using the framework of simulated heating, we investigate both static and dynamic strategies for systematically managing the trade-off between PLSA accuracy and optimization effort. Our goal is to achieve maximum solution quality within a fixed optimization time budget. We show that the simulated heating technique better utilizes the given optimization time resources than standard hybrid methods that employ fixed parameters, and that the technique is less sensitive to these parameter settings. We demonstrate our techniques on the well-known binary knapsack problem and two problems in electronic design automation. We compare our results to the standard hybrid methods, and show quantitatively that careful management of this trade-off is necessary to achieve the full potential of an EA/PLSA combination.

High quality, lattice matched Zn1−xCdxSe has been grown on InP substrates by molecular beam epitaxy. The quality of the epilayers was monitored by reflection high energy electron diffraction, and by low temperature photoluminescence and transmission electron microscopy (TEM). The use of an As flux during the pregrowth substrate treatment followed by a low initial growth temperature were needed to optimize the growth. TEM images of samples grown under these conditions show abrupt interfaces and good crystalline quality. Epilayers exhibit excellent optical properties, indicated by a very narrow, high intensity near‐band‐edge excitonic emission peak (full width at half maximum of 10 meV), and almost negligible deep level emission.

Optical interconnects are being considered as a possible solution to the well-known problems of scaling in VLSI interconnects. Along with enabling higher speed interconnects, optics allows the construction of highly connected and irregular networks that are streamlined for particular applications. Using these networks, it is possible to implement application mappings that allow flexible, single-hop communication patterns between processors. This has advantages for reduced system latency and power. Such optically connected multiprocessors are particularly promising for embedded digital signal processing (DSP) applications, which are highly parallel, and typically have tight constraints on latency and power consumption. This paper addresses novel trade-offs involving communication routing flexibility, power consumption, and performance that arise in the context of system synthesis of optically-interconnected multiprocessors. We report on experimental results that expose these trade-offs, and propose systematic techniques to address them efficiently. We demonstrate the performance of these techniques on several benchmark examples.

In this paper, we explore a hybrid global/local search optimization framework for dynamic voltage scaling in embedded multiprocessor systems. The problem is to find, for a multiprocessor system in which the processors are capable of dynamically varying their core voltages, the optimum voltage levels for all the tasks in order to minimize the average power consumption under a given performance constraint. An effective local search approach for static voltage scaling based on the concept of a period graph has been demonstrated previously. To make use of it in an optimization problem, the period graph must be integrated into a global search algorithm. Simulated heating, a general optimization framework developed previously, is an efficient method for precisely this purpose of integrating local search into global search algorithms. However, little is known about the management of computational (compile-time) resources between global search and local search in hybrid algorithms, such as those coordinated by simulated heating. In this paper, we explore various hybrid search management strategies for power optimization under the framework of simulated heating. We demonstrate that careful search management leads to significant power consumption improvement over add-hoc global search/local search integration, and explore alternative approaches to performing hybrid search management for dynamic voltage scaling.

Self-timed scheduling is an attractive implementation style for multiprocessor DSP systems due to its ability to exploit predictability in application behavior, its avoidance of over-constrained synchronization, and its simplified clocking requirements. However, analysis and optimization of self-timed systems under real-time constraints is challenging due to the complex, irregular dynamics of self-timed operation. This paper examines a number of intermediate representations for compiling data flow programs onto self-timed DSP platforms, and discusses efficient techniques that operate on these representations to streamline scheduling, communication synthesis, and power management of self-timed implementations.

Both wurtzite-and zincblende-GaN films have been grown on sapphire and MgO substrates, respectively, and examined by photoluminescence and x-ray analysis. GaN films were grown on suitably prepared Al2O3 and MgO substrates by molecular beam epitaxy employing a rf plasma discharge, nitrogen free radical source. The wurtzite-and zincblende-GaN films exhibited dominant near band-edge emission, the nature of which will be compared and contrasted for both phases in this paper. X-ray diffraction data for both phases will also be discussed.

We have grown high quality lattice-matched ZnCdSe and ZnSeTe on InP. To optimize the interfaces, the initial growth temperature was lowered and an As flux was used during the thermal treatment of InP substrates prior to epitaxial growth. Under optimized condition, 2D nucleation was observed by reflection high energy electron diffraction (RHEED) throughout the entire growth. Photoluminescence (PL), photoreflectance (PR), transmission electron microscopy (TEM) were used to carry out the sample characterization. Low temperature PL spectra for ZnCdSe show a narrow excitonic emission. PR spectra from ZnCdSe samples also suggest very high quality layers. The ZnSeTe exhibits a strong defect level emission at energy close to band gap and very weak deep level emission. TEM study suggest that the interfaces are comparable to those obtained between ZnSe and GaAs. These results, combined with the new possibilities from these materials, make InP an attractive substrate for II-VI epitaxy.© (1994) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

In this work, we study the growth parameters of ZnSe on GaAs by MOCVD and characterize the epilayers by various techniques. Epilayers were grown using diethylzinc (DEZn) and diethylselenide (DESe) as source materials. Growth studies were done at 400 degree(s)C under different growth conditions in an atmospheric pressure MOCVD reactor. Different DESe to DEZn ratios (from 0.5 to 5) were used to study the effects of VI/II ratio on ZnSe quality. The as-grown ZnSe epilayers were characterized by double crystal x-ray diffraction, transmission electron microscope (TEM), and scanning electron microscope. The results show excellent surface morphology and crystal quality of ZnSe. The best material was grown on undoped GaAs at the VI/II ratio near unity. The full-width-at-half-maximum of ZnSe (approximately 0.5 micrometers thick) x-ray peak as low as 90 arc seconds was achieved. To our knowledge, this is the narrowest peak among the reported results of ZnSe on GaAs. TEM results also show very low defect density. ZnSe epilayer with low stacking faults density (less than 105/cm2) and large spacing between misfit dislocations (approximately micrometers ) were grown on GaAs.© (1994) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

High-quality ZnSe epilayers on GaAs substrates have been grown by MOCVD. Diethylzinc (DEZn) and diethylselenide (DESe) were used as source materials. Growth studies were done at 400°C under different growth conditions in an atmospheric pressure MOCVD reactor. The as-grown ZnSe epilayers were characterized by a wide variety of techniques, such as double crystal x-ray diffraction, low-temperature photoluminescence (PL), transmission electron microscopy (TEM), secondary ion mass spectrometry (SIMS), and scanning electron microscopy (SEM).The results show excellent structural and optical properties of ZnSe. The best material was grown on undoped GaAs at the VI/II ratio near unity. The full-width-at-half-maximum (FWHM) of ZnSe (∼0.2/μm thick) x-ray peak as low as 90 arc seconds was achieved. TEM results also show very low defect density. The density of stacking faults is less than 105/cm2 which is four orders of magnitude less than that of samples grown by conventional MBE [J. Petruzzello et al. J. Appl. Phys. 63, 2299 (1988)] and MOCVD [J.L. Batstone et al. Philos. Mag A, 66, 609, 1992]. The spacing between misfit dislocations is between 5 to 10,μm which is one order of magnitude larger than that of reported sample of comparable thickness.