43 results on '"Nazar, Gabriel L."'
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2. PReCEP: Automatic insertion of Partial Redundancy based on Critical Error Probability
3. GRASP-based High-Level Synthesis Design Space Exploration for FPGAs
4. Constraint-Aware Multi-Technique Approximate High-Level Synthesis for FPGAs
5. Exploring redundancy granularities to repair real-time FPGA-based systems
6. Low Cost Dynamic Scrubbing for Real-Time Systems
7. Fault Tolerance Mechanisms for FPGA-Based Regular Expression Matching
8. Improving FPGA repair under real-time constraints
9. SNAP: Selective NTV Heterogeneous Architectures for Power-Efficient Edge Computing
10. Evaluation of high-level languages for general FPGA acceleration
11. Lightweight Dual Modular Redundancy through Approximate Computing
12. Throughput-Oriented Spatio-Temporal Optimization in Approximate High-Level Synthesis
13. A Reliability-Oriented Machine Learning Strategy for Heterogeneous Multicore Application Mapping
14. Firefly: An Open-source Rocket-based Intermittent Framework
15. A Machine Learning Approach for Reliability-Aware Application Mapping for Heterogeneous Multicores
16. Enhancing Real-Time Motion Estimation through Approximate High-Level Synthesis
17. High-level synthesis of throughput-optimized and energy-efficient approximate designs
18. A Survey on FPGA Support for the Feasible Execution of Virtualized Network Functions
19. Improving Software-based Techniques for Soft Error Mitigation in OoO Superscalar Processors
20. High-Level Synthesis of Approximate Designs under Real-Time Constraints
21. A Knapsack Methodology for Hardware-based DMR Protection against Soft Errors in Superscalar Out-of-Order Processors
22. Cost-effective Resilient FPGA-based LDPC Decoder Architecture
23. High-Level Synthesis of Resource-oriented Approximate Designs for FPGAs
24. A Machine Learning Approach for Reliability-Aware Application Mapping for Heterogeneous Multicores.
25. Precise evaluation of the fault sensitivity of OoO superscalar processors
26. High-Level Synthesis of Resource-oriented Approximate Designs for FPGAs.
27. Scalable memory architecture for soft-core processors
28. Low cost resilient regular expression matching on FPGAs
29. Live-Out Register Fencing
30. A fault injection platform for FPGA-based communication systems
31. Adaptive Low-Power Architecture for High-Performance and Reliable Embedded Computing
32. Reliable execution of statechart-generated correct embedded software under soft errors
33. Scrubbing unit repositioning for fast error repair in FPGAs
34. Accelerated FPGA repair through shifted scrubbing
35. Radiation and Fault Injection Testing of a Fine-Grained Error Detection Technique for FPGAs
36. Adapting communication for adaptable processors: A multi-axis reconfiguration approach
37. Fast single-FPGA fault injection platform
38. Simultaneous reconfiguration of issue-width and instruction cache for a VLIW processor
39. Adaptive parallelism exploitation under physical and real-time constraints for resilient systems
40. Fast error detection through efficient use of hardwired resources in FPGAs
41. Exploiting Modified Placement and Hardwired Resources to Provide High Reliability in FPGAs
42. An Area Effective Parity-Based Fault Detection Technique for FPGAs
43. Energy efficient pseudo-cache architecture through fine-grained reconfigurability
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