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2. Experiences using a novel Python-based hardware modeling framework for computer architecture test chips

Author

Shreesha Srinath, Bharath Sudheendra, Robin Ying, Christopher Batten, Christopher Torng, Suren Jayasuriya, Moyang Wang, Nagaraj Murali, and Taylor Pritchard

Subjects
010302 applied physics, Hardware architecture, Computer science, business.industry, Design for testing, Design flow, 02 engineering and technology, Python (programming language), Chip, 01 natural sciences, 020202 computer hardware & architecture, Computer architecture, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, IBM, Design methods, business, computer, Computer hardware, computer.programming_language, Agile software development
Abstract

This poster will describe a taped-out 2×2mm 1.3 M-transistor test chip in IBM 130 nm designed using our new Python-based hardware modeling framework. The goal of our tapeout was to demonstrate the ability of this framework to enable Agile hardware design flows.

Published
2016
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