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Your search keyword '"NAGARIA, R. K."' showing total 157 results
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157 results on '"NAGARIA, R. K."'

2. Design of Low-Power High Performance SAR Analog-To-Digital Converter Based on MOS Capacitor DAC Structure

Author

Shubham, Kumar, Tiwari, Vikas, Nagaria, R. K., Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Oneto, Luca, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zamboni, Walter, Series Editor, Zhang, Junjie James, Series Editor, Nagaria, R. K., editor, Tripathi, V. S., editor, Zamarreno, Carlos Ruiz, editor, and Prajapati, Yogendra Kumar, editor

Published
2023
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3. Review of the SAR ADC’s Energy Efficient Switching Scheme

Author

Tiwari, Vikas, Nagaria, R. K., Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Oneto, Luca, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zamboni, Walter, Series Editor, Zhang, Junjie James, Series Editor, Nagaria, R. K., editor, Tripathi, V. S., editor, Zamarreno, Carlos Ruiz, editor, and Prajapati, Yogendra Kumar, editor

Published
2023
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4. Design of Low Power High Speed 2nd Order Discrete Time Sigma-Delta Modulator Using Charge Shared Double Tail Dynamic Comparator

Author

Mathur, Virat, Tiwari, Vikas, Nagaria, R. K., Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Oneto, Luca, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zamboni, Walter, Series Editor, Zhang, Junjie James, Series Editor, Nagaria, R. K., editor, Tripathi, V. S., editor, Zamarreno, Carlos Ruiz, editor, and Prajapati, Yogendra Kumar, editor

Published
2023
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6. The Impact of Fin Shape Variation on Accumulation-Mode Bulk FinFETs’ Analog and RF Performance for Different Dielectrics

Author

Vaghela, Mihir, Nagaria, R. K., Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Oneto, Luca, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zamboni, Walter, Series Editor, Zhang, Junjie James, Series Editor, Dhawan, Amit, editor, Mishra, R. A., editor, Arya, Karm Veer, editor, and Zamarreño, Carlos Ruiz, editor

Published
2022
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7. Design and Performance of High-Speed CMOS Double-Tail Dynamic Comparator Suitable for Mixed-Signal ICs

Author

Dubey, Avaneesh K., Varshney, Vikrant, Kumar, Ankur, Pal, Pratosh K., Nagaria, R. K., Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Harvey, David, editor, Kar, Haranath, editor, Verma, Shekhar, editor, and Bhadauria, Vijaya, editor

Published
2021
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8. Leakage-Tolerant Low-Power Wide Fan-in OR Logic Domino Circuit

Author

Kumar, Ankur, Pal, Pratosh K., Varshney, Vikrant, Dubey, Avaneesh K., Nagaria, R. K., Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Harvey, David, editor, Kar, Haranath, editor, Verma, Shekhar, editor, and Bhadauria, Vijaya, editor

Published
2021
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10. WSe₂ and MoS₂ Nanocomposite-Based Efficient Broadband Photodetector

Author

Bajpai, Tulika, Tripathi, Saumya, Dwivedi, Ajay Kumar, Nagaria, R. K., and Tripathi, Shweta

Abstract

This letter reports a Al/WSe2:MoS2/ITO coated PET structure based broadband photodetector. The device utilizes WSe2: MoS2 nanocomposite (NC) as an active layer prepared using dispersion method. The nanocomposite film was deposited over ITO coated PET through spin coating technique. The Al contacts were deposited over WSe2: MoS2 nanocomposite by means of thermal evaporation unit. The proposed photodetector exhibits a broad photo response with maximum responsivity $\text {R}_{\text {S}}$ (A/W) of 10.75 A/W, 85.45 A/W, and 146.96 A/W; at 350nm (UV), 750nm (visible) and 900nm (IR) at -1V bias. The nanocomposite shows promising characteristics for optoelectronic application. WSe2:MoS2 NC shows a wide absorbance spectra, covering ultraviolet (UV)-visible-near infrared (NIR) regions.

Published
2024
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15. Red phosphorus/WSe2 heterojunction based self-powered UV photodetector.

Author

Bajpai, Tulika, Dwivedi, Ajay Kumar, Nagaria, R. K., and Tripathi, Shweta

Subjects
PHOTODETECTORS, HETEROJUNCTIONS, AUTOMATIC timers
Abstract

This letter reports Al/Red Phosphorus (RP)/WSe2/ITO heterostructure based self-powered UV photodetector designed by low-cost solution technique. The p–n junction is formed between p-type WSe2 and n-type red phosphorus (RP) material deposited over ITO coated PET substrate. The designed photodetector device shows Responsivity R s (A/W) of 0.23 and 0.12 (voltage bias ~ 2 V) at 300 nm and 350 nm wavelength, respectively. The rise and fall time of the device are obtained as ~ 0.19 µs and ~ 0.12 µs in UV region. [ABSTRACT FROM AUTHOR]

Published
2024
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17. Electronically Tunable Current Mode Instrumentation Amplifier Employing Single DV-EXCCCII.

Author

Singh, Priyanka and Nagaria, R. K.

Subjects
*CURRENT conveyors, *LINE drivers (Integrated circuits), *ELECTRONIC design automation
Abstract

In this paper, a new design of a current mode instrumentation amplifier (CMIA) is presented using a single differential voltage extra-X current controlled current conveyor (DV-EXCCCII) and a grounded resistor. Therefore, this circuit design is very simple and suitable for IC integration. The proposed circuit of instrumentation amplifier has high output impedance so it is easily cascadable with other current mode circuits without buffer requirement. Furthermore, the proposed circuit is electronically tunable with the bias current of the active element used. This circuit offers good frequency performance with wide differential gain and CMRR bandwidth. The non-idealities and parasitic effects of the proposed circuit are also investigated. To validate the proposed instrumentation amplifier, various simulations are performed using the CADENCE VIRTUOSO SPECTRE simulator using 0.18 µm CMOS technology parameters. [ABSTRACT FROM AUTHOR]

Published
2024
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18. First order universal filters employing single DV-EXCCCII.

Author

Singh, Priyanka and Nagaria, R. K.

Subjects
*CURRENT conveyors, *HIGHPASS electric filters, *CAPACITORS, *SIGNAL processing
Abstract

This paper reports two filter circuits based on Differential Voltage Extra-X Current Controlled Current Conveyor (DV-EXCCCII). The first proposed circuit is a voltage-mode first-order universal filter that employs one DV-EXCCCII, one resistor, and one grounded capacitor. This circuit can realise all standard first-order filters, that is, low-pass, high-pass and all-pass filter. The second proposed circuit is a first-order multimode universal filter that employs a single DV-EXCCCII. This circuit can realise filter in current-mode, voltage-mode and trans-admittance mode with a single capacitor. However, a trans-impedance mode universal filter is realised with an additional resistor. Furthermore, the filter is electronically tunable with the bias current of DV-EXCCCII. The proposed filter circuits are verified using the SPECTRE simulator of CADENCE VIRTUOSO tool in 0.18 µm UMC CMOS technology parameters. [ABSTRACT FROM AUTHOR]

Published
2023
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26. A Novel Method to Control Leakage and Noise in Domino Circuit for Wide Fan-In OR Logic.

Author

Kumar, Ankur and Nagaria, R. K.

Subjects
*NOISE control, *LOGIC, *VERY large scale circuit integration, *STRAY currents, *NOISE
Abstract

This paper proposes a novel method to control leakage and noise in domino circuits for wide fan-in OR logic with low power consumption, low process variation, and higher noise margin under the similar delay condition. In the proposed method, output and dynamic nodes are isolated from the PDN (Pull-Down Network) to improve the noise immunity and reduce switching activity. Further, with the aid of a transistor in the stack, the sub-threshold current is reduced. Thus, the proposed domino is applicable for high-speed and low-power applications in deep sub-micro-range. Simulation results show that the proposed domino improves the noise immunity and figure of merit (FOM) by factors of 1.95 and 2.34, respectively, with respect to the conventional domino with a footer. Along with this improvement, 26% reduction is also observed in power consumption. The entire simulations for all the domino circuits are done at 45-nm CMOS technology by using SPECTRE simulator under the Cadence Virtuoso environment. [ABSTRACT FROM AUTHOR]

Published
2022
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27. Electronically tunable DV-EXCCCII-based universal filter.

Author

Singh, Priyanka and Nagaria, R. K.

Subjects
*ELECTRIC circuits, *COMPLEMENTARY metal oxide semiconductors, *ELECTRIC impedance, *CURRENT conveyors, *ELECTRONIC data processing
Abstract

A new analog block, Differential Voltage Extra-X Current Controlled Conveyor (DV-EXCCCII) based current mode universal filter configuration is introduced in this paper. Only one current mode analog block DV-EXCCCII, three grounded components are used to design proposed filter configuration. This circuit provides high output impedance, which allows cascading feature to circuit without need of extra buffer circuit. This configuration realise all five (Low Pass, High Pass, All Pass, Band Pass and Band Reject) second-order filter functions with an appropriate selection of input. Bias current of DV-EXCCCII provides the electronic tuning characteristic to proposed circuit. Sensitivity due to passive components and non-idealities of the analog block is low and magnitude is below unity. The proposed filter circuit configuration is designed in CADENCE and simulated with SPECTRE using 180 nm UMC CMOS process technology. [ABSTRACT FROM AUTHOR]

Published
2021
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