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In this letter, we demonstrated an approach to introduce a positive shift in transfer curves of lateral metal-oxide-semiconductor field-effect transistors (MOSFETs) on 4H-SiC (0001), without deterioration of channel conductance. With an additional Al2O3 thin film on thermally grown SiO2 after the nitridation process, a dipole layer was formed at the Al2O3/SiO2 interface, which induced the positive shift of flat-band voltage. The field-effect mobility of MOSFET was not changed after the Al2O3 fabrication process, which means that the quality of the nitrogen-passivated SiO2/SiC interface was not damaged by this process.

We used the POCl3 gate technique for the fabrication of 4H-SiC vertical MOSFETs, and examined its effect on the VTH-RON tradeoff and the compatibility with device fabrication. The gate oxide film was formed by thermal dry O2 oxidation followed by POCl3 or NO annealing. The POCl3 process reduced RON by about 30% compared with the NO process for the ones having VTH of 1.1 V, being attributed to the channel mobility enhancement. Moreover, the improvement was more effective for higher VTH designs. The conventional thermal treatment after the gate process considerably spoiled the channel mobility improvement brought by the POCl3 annealing and strengthened negative charge trapping in the gate oxide. The presumed extra-formed defects also affected the EOX dependence of tBD on the TDDB tests, being expected to shorten the gate oxide lifetime under practical device operation stress. Successful insertion of the POCl3 process into production lines depends upon careful low-temperature post processing.

We investigated the positive bias temperature instability (PBTI) in 4H-SiC MOSFETs under a wide range of high oxide electric field (E ox ) stress. The purpose of this study is to deepen the understanding of this phenomenon and experimentally evaluate the lifetime prediction model. For the first time, we analyzed the process of electron capture in SiO 2 under high E ox stress by focusing on the region where electron capture is dominant and found systematical behavior of threshold voltage drift (ΔV th ). Additionally, the amount of charges injected into the gate oxide (Q stress ) was found to be a criterion for ΔV th in a high E ox region. Finally, it was presented that lifetime under PBTI testing exhibits a power-law relationship with E ox , resulting in longer lifetime than that predicted by the widely used E-model. Insights from the presented analyses must be beneficial for PBTI modeling and testing of SiC MOSFETs.

The positive flat-band voltage (VFB) shifts of 4H-SiC (0001) MOS capacitors with Al2O3/SiO2 dielectric layers were systematically investigated. After nitridation, there was a negative shift of VFB due to the dipole layer at the SiO2/4H-SiC interface induced by Si-N bonds. However, with Al2O3 layer deposition on thermally grown oxide, an additional dipole layer was formed at the Al2O3/SiO2 interface, which induced positive shift of VFB. Interface state density was estimated to show that the Al2O3 fabrication process had no impact on the quality of SiO2/4H-SiC interface.

We demonstrate a Si-face 4H-SiC MOSFET with oxygen (O) doping in the channel region for the first time. Compared with a conventional device, the O-doped channel was found to provide lower channel resistance (R ch ) and higher threshold voltage (V th ), which is expected from the fact that O acts as a deep level donor in 4H-SiC. By applying this novel technique to vertical 4H-SiC MOSFETs, 32 % reduction of specific on resistance (R on ) at a high V th of 4.5 V was achieved. In order to evaluate gate oxide reliability, negative bias temperature instability (NBTI) of V th was investigated. The O-doped channel shows a smaller V th shift, and its acceleration coefficient of the time to V th shift is similar to that of a conventional one. Therefore, the O-doped channel is found to be a promising approach to further improve NBTI of 4H-SiC MOSFETs by channel engineering using deep level donors.

We propose a method to experimentally evaluate the carrier transport properties in the inversion layer of SiC metal-oxide-semiconductor field effect transistors (MOSFETs). Intrinsic phonon-limited mobility $(\mu_{\mathrm{phonon}})$ in the SiC MOSFETs was successfully observed owing to the suppression of severe impact of Coulomb scattering on the SiC MOS inversion layer by lowing the acceptor concentration to the order of $1\times 10^{14}$ cm−3, Additionally, the $\mu_{\mathrm{phonon}}$ was found not to be affected by nitridation, representing a fundamental feature of thermally oxidized SiO 2 /4H-SiC systems. On the basis of this finding, Coulomb-and surface roughness-limited mobility were evaluated by using their dependences on surface carrier density or effective normal electric field $(E_{\mathrm{eff}})$ . Dominant limiting factors of inversion layer mobility in Si-face 4H-SiC MOSFETs were found to be phonon and Coulomb scatterings, and not surface roughness scattering even at high $E_{\mathrm{eff}}$ region. These results represent that conventional understanding of carrier scattering in the SiC MOS inversion layer should be modified, especially in the high $E_{\mathrm{eff}}$ region.

The electrical characteristics of the SiC metal-oxide-semiconductor field effect transistor (MOSFET) have been limited by large amount of states at the SiO2/SiC interface. In this study, the accuracy of the energy level of the interface states extracted by hypothetical high frequency extreme, which is conventionally used, is experimentally examined. Conductance measurements at low temperature between 65 K and 100 K reveal that the extracted energy distribution of the interface states at nitrided SiO2/SiC interface close to the conduction band edge depends on the measurement temperature. It is demonstrated that conductance method at 65K enables us more accurate evaluation of the interface states at the SiO2/SiC interface and found that the interface states density (Dit) of nitride SiO2/SiC interface is over 1013 cm-2eV-1 at energy level of 0.1 eV below the conduction band edge.

We demonstrate Si-face 4H-SiC MOSFET using sulphur (S) as a deep level donor in channel region, for the first time. Contrary to general recognition that deep level donors are not suitable for device fabrication, S is found to be a promising deep level donor for the channel region of 4H-SiC MOSFETs. Compared with channels doped by shallow level donors, S-doped channel is found to provide lower channel resistance (R ch ) and higher threshold voltage (V th ). On the basis of simulations and experiments, this improvement is found to be ascribed to two inherit natures of S in 4H-SiC. One is the large ionization energy (E ion ), resulting in the increase of V th . Another is that S act as a donor, improving inversion layer mobility in channel region. By applying this novel channel engineering to vertical 4H-SiC MOSFETs, 31% reduction of specific on resistance (Ron) at high V th of 4.0 V was achieved.

We determined the intrinsic phonon-limited mobility in the SiC MOSFET, for the first time. Based on this finding, the carrier transport properties of 4H-SiC MOSFETs such as phonon, surface roughness and Coulomb scattering were evaluated by experimental procedures. This approach is different from the conventional methods, which have adjusted the parameters in the mobility models. It was realized due to the suppression of severe impact of Coulomb scattering on SiC MOS inversion layer by lowering the acceptor concentration of p-type well region in the order of 1014 cm−3. The phonon-limited mobility of the SiC MOSFET is revealed to be one fourth or less than conventionally presumed values. In addition, different from the conventional understanding, it was clarified that surface roughness scattering is not the most dominant mobility limiting factor even in high effective normal field for the SiC MOSFET. These results represent that conventional mobility models should be modified in high effective normal field, especially at high temperature.

The inversion layer mobility of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) with a thermally grown gate oxide was investigated using Hall effect measurements. To clarify the fundamental scattering properties of inversion layer mobility in SiO2/4H-SiC systems, we examined the effects of nitridation treatment after thermal oxidation and the gate oxide thickness on Hall effect mobility (μ Hall) in the inversion layer of 4H-SiC MOSFETs. The effect of nitridation treatment after thermal oxidation on phonon-limited mobility (μ phonon) was investigated by using a p-type well region with an epitaxial layer with extremely low acceptor concentration (N A). It was found that nitridation treatment had little effect on μ phonon for gate oxide thicknesses of 5 nm and 50 nm. The carrier transport properties were experimentally evaluated from the viewpoint of the effects of gate oxide thickness and nitridation treatment after thermal oxidation. Here, we used samples with a moderate N A of 1 × 1016 cm−3, which enabled us to distinguish μ phonon, Coulomb-limited mobility (μ Coulomb) and surface roughness-limited mobility (μ SR). It was found that thermally grown SiO2/4H-SiC systems have the common feature that the dominant scattering components in the inversion layer are phonon scattering and Coulomb scattering and not surface roughness scattering at room temperature within the measured effective normal field (E eff).

We propose a method to evaluate the carrier transport properties in the inversion layer of 4H–SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) experimentally. Our approach differs from conventional methods, which have adjusted the parameters in conventional mobility models. Intrinsic phonon-limited mobility (μ phonon) in the SiC MOSFET was observed by suppressing the severe impact of Coulomb scattering on the SiC MOS inversion layer by lowering the acceptor concentration (N A) of the p-type well region to the order of 1014 cm−3. In this study, we investigated the carrier transport properties in the inversion layer of Si-face 4H–SiC MOSFETs with nitrided oxide. It is revealed that the μ phonon of the SiC MOSFET is a quarter or less than the conventionally presumed values. Additionally, surface roughness scattering is found not to be the most dominant mobility-limiting factor even at high effective normal field (E eff) for the SiC MOSFET. These results demonstrate that conventional understanding of carrier scattering in the SiC MOS inversion layer should be modified, especially in the high E eff region.

The Hall effect mobility (μHall) of the Si-face 4H-SiC metal–oxide–semiconductor field effect transistor (MOSFET) with a nitrogen (N)-implanted channel region was investigated by increasing the N dose. The μHall in the channel region was systematically examined regarding channel structures, that is, the surface and buried channels. It was experimentally demonstrated that increasing the N dose results in an improvement in μHall in the channel region due to the formation of the buried channel. However, further increase in N dose was found to decrease the μHall in the channel region, owing to the decrease in the electron mobility in the N-implanted bulk region.

In this study, we investigate the influence of wet oxidation after nitridation of a gate oxide on the interface states in SiC metal–oxide–semiconductor field-effect transistors (MOSFETs). We used deep-level transient spectroscopy (DLTS) to clarify the mechanism behind the positive shift in the threshold voltage after wet oxidation without any significant decrease in the mobility. We applied DLTS using a small pulse to obtain the depth profile of the states. We found that the density of deep-level states near the interface on the SiC side increased after wet oxidation at 600 and 800 °C, whereas the density of shallow states did not increase. This result indicates that the increase in the deep-level states is related to the threshold-voltage shift, and there is no degradation in the mobility.