Search

Artificial intelligence (AI) is one of the most promising technologies based on machine learning algorithms. In this paper, we propose a workflow for the implementation of deep neural networks. This workflow attempts to combine the flexibility of high-level compilers (HLS)-based networks with the architectural control features of hardware description languages (HDL)-based flows. The architecture consists of a convolutional neural network, SqueezeNet v1.1, and a hard processor system (HPS) that coexists with acceleration hardware to be designed. This methodology allows us to compare solutions based solely on software (PyTorch 1.13.1) and propose heterogeneous inference solutions, taking advantage of the best options within the software and hardware flow. The proposed workflow is implemented on a low-cost field programmable gate array system-on-chip (FPGA SOC) platform, specifically the DE10-Nano development board. We have provided systolic architectural solutions written in OpenCL that are highly flexible and easily tunable to take full advantage of the resources of programmable devices and achieve superior energy efficiencies working with a 32-bit floating point. From a verification point of view, the proposed method is effective, since the reference models in all tests, both for the individual layers and the complete network, have been readily available using packages well known in the development, training, and inference of deep networks. [ABSTRACT FROM AUTHOR]

Options for optimizing the energy and spatial resolution of gamma-ray imaging detectors based on thick, monolithic crystals shaped like fiat-topped pyramids were studied. Monte Carlo simulations were made of the scintillation light transport for evaluating the effect of four parameters on the energy resolution, the spatial resolutions, and the depth of interaction (DOI) resolution of the gamma-ray imaging detector. These four parameters are: the reflectivity of the surface coating; the scatter mean free path; the absorption mean free path of the scintillation light; and the angle that defines the inclination of the sides of the pyramidal frustum. In real detectors, the values for the mean free paths for optical photons are normally not known. We estimated these by comparing MC simulations of detector resolutions to measurements for three gamma-ray imaging detectors with LYSO and LSO from different suppliers and with different surface coatings and geometries. The gamma-ray imaging detector measures the energy, centroids, and depth of interaction of the gamma-ray. DOI enhanced charge dividing readouts were used to measure the depth of interaction. Index Terms--Crystal geometry, gamma ray imaging, interaction depth, monolithic scintillator, surface coating.

Digital Positron Emission Tomography (PET) systems enable us to implement sophisticated algorithms for real time signal processing. Usually, energy and position are encoded on the amplitude of the digitized signals. Although a lot of work has been made for spectroscopy applications, digital pulse height estimation in PET detectors presents important challenges mainly due to the fast response of state-of-the-art detectors. In this paper we propose a digital filtering technique for improving amplitude estimation in order to achieve high spatial and energy resolution with moderate conversion rates ( Index Terms--Adaptive signal processing, biomedical nuclear imaging, FIR digital filters, least mean square (LMS) methods, positron emission tomography (PET).

An ASIC front-end has been developed for multianode photomultiplier based nuclear imaging devices. Its architecture has been designed to improve resolution and decrease pile-up probability in Positron Emission Tomography systems which employ continuous scintillator crystals. Analog computation elements are isolated from the photomultiplier by means of a current sensitive preamplifier stage. This allows digitally programmable adjustment of every anode gain, also providing better resolution in gamma event position calculation and a shorter front-end deadtime. The preamplifier stage also offers the possibility of using other types of photomultiplier devices such as SiPM. The ASIC architecture includes measurement of the depth of interaction of the gamma event based on the width of the light distribution in order to reduce parallax error and increase spatial resolution during image reconstruction stage. An output stage of transresistance amplifiers offer voltage output signals which may be introduced in the A/D conversion stage with no further processing. Index Terms--ASIC, depth of interaction, front-end, PET, pile-up.

Neurofeedback is a self-regulation technique that can be applied to learn to voluntarily control cerebral activity in specific brain regions. In this work, a Transcranial Doppler-based configurable neurofeedback system is proposed and described. The hardware configuration is based on the Red Pitaya board, which gives great flexibility and processing power to the system. The parameter to be trained can be selected between several temporal, spectral, or complexity features from the cerebral blood flow velocity signal in different vessels. As previous studies have found alterations in these parameters in chronic pain patients, the system could be applied to help them to voluntarily control these parameters. Two protocols based on different temporal lengths of the training periods have been proposed and tested with six healthy subjects that were randomly assigned to one of the protocols at the beginning of the procedure. For the purposes of the testing, the trained parameter was the mean cerebral blood flow velocity in the aggregated data from the two anterior cerebral arteries. Results show that, using the proposed neurofeedback system, the two groups of healthy volunteers can learn to self-regulate a parameter from their brain activity in a reduced number of training sessions.