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This paper presents the design and characterization of a new analog voltage follower for low-voltage applications. The main idea is based on the “Flipped” Voltage Follower and the use of the quasi-floating gate technique for achieving class AB operation. A test cell was simulated and fabricated using a 0,5 μm CMOS technology. When the proposed circuit is supplied with VDD = 1,5 V, it presents a power consumption of only 413 μW. Measurement and experimental results show a gain bandwidth product of 10 MHz and a total harmonic distortion of 1,12 % at 1 MHz., En este trabajo se presenta el diseño y caracterización de un nuevo seguidor de voltaje analógico para aplicaciones de bajo voltaje. La idea principal aquí desarrollada, está basada en el Seguidor de Voltaje “Volteado” y el uso de técnicas de compuerta casiflotante para lograr un funcionamiento de clase AB. Usando una tecnología CMOS de 0.5 μm, se simuló y se fabricó una celda de prueba. Cuando el circuito propuesto se alimenta con VDD = 1,5 V, este presenta un consumo de potencia de tan solo 413 μW. Las mediciones y los resultados experimentales muestran un producto ganancia-ancho de banda de 10 MHz y una distorsión harmónica total de 1,12 % a 1 MHz.

The design and implementation of three analog median filter topologies, whose transistors operate in the deep weak-inversion region, is described. The first topology is a differential pairs array, in which drain currents are driven into two nodes in a differential fashion, while the second topology is based on a wide range OTA, which is used to maximize the dynamic range. Finally, the third topology uses three range-extended OTAs. The proposed weak-inversion filters were designed and fabricated in ON Semiconductor 0.5 micrometer technology through MOSIS. Experimental results of three-input fabricated prototypes for all three topologies are show, where power consumptions of 90nW in the first case, and 270nW in the other two cases can be noticed. A dual power supply +/-1.5 Volts were used.