Search

The advancement in technologies has been increasing with increase in integrating scales which allows fabricating millions of transistors on a chip. This demands the efficient testing circuit to evaluate the fault present, where the large volume of data volume needs to be tested during manufacturing and fabrication. Therefore, the challenging fact arises in methodologies to achieve the test data compression. Even though various techniques in the present scenario reduce the testing time, improvement in data volume reduction is still a demanding factor. The proposed scheme aims to obtain a Large Compression Ratio. By using Augmented Recurrence Hopping based Run-Length Coding (ARHRLC) Test Data volume can be reduced and data can be compressed. The proposed ARHRLC coding technique which compares the group code based test vector and it’s duplicate. Data sequence can be decreased in terms volume and area overhead. From the analysis of ISCAS 89 benchmark circuit’s performance shows the proposed coding scheme outperforms the conventional test data compression methods. The Augmented Recurrence Hopping based Run-Length Coding procedure skips the repeated sequence in the test vector group and estimate conversely perfect example of a separate test information section or various test information fragment. The test result demonstrates that the compression proportion and calculation time is lessened. [ABSTRACT FROM AUTHOR]