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We report a rare case of KIT-negative extra-gastrointestinal stromal tumor, in a 40-year-old woman. Contrast-enhanced computed tomography and magnetic resonance imaging revealed a >15-cm mass of multiple cystic lesions in the greater omentum. Histopathological findings after surgery showed a sheet-like growth of stellate tumor cells from epithelial cells, cystic degeneration, and mucus-like stroma. Immunohistochemistry was positive for discovered on GIST-1 (DOG1) but negative for CD117 (c-kit).

To evaluate the enhancement pattern of diffuse-type gastric cancers (DGCs) on multiphasic contrast-enhanced computed tomography gastrography (CECTG). We studied 21 consecutive clinically diagnosed DGC patients who underwent CECTG. Gastric distension was obtained using effervescent granules. CT images were obtained 40 s (arterial phase) and 240 s (delayed phase) after injection of a nonionic contrast material. Two radiologists reviewed the CT images and analyzed layers and enhancement patterns. The readers evaluated the enhancement degree (mild, moderate, or marked) and calculated CT attenuation values by placing circular regions of interest (ROIs) within each layer of the lesion. The CT findings of 11 operated cases were correlated with pathological results. Most lesions were double-layered in the arterial phase, with a moderately enhanced inner layer and a mildly enhanced outer layer, and single-layered in the delayed phase. The mean attenuation value of the inner layer (146 ± 32.8 HU) was significantly higher than that of the outer layer (80.4 ± 15.5 HU) in the arterial phase (p = 0.0001). In the pathological analysis, wall stratification was preserved in nine cases and not preserved in two cases. Most DGCs showed a double-layered pattern in the arterial phase and a single-layered pattern with moderate enhancement in the delayed phase.

To investigate the feasibility of diagnosing the invasion depth of early colorectal cancer (CRC) by quantitatively evaluating the basal indentation (BI)—i.e., the intestinal lateral deformity—in CT colonography (CTC). 34 early CRCs (13 Tis CRCs and 21 T1 CRCs) in 32 patients who underwent a preoperative CTC were retrospectively examined. Two radiologists calculated the depth of the BI on a computed tomographic air-contrast enema (CT enema) image, the depth of the BI due to the geometric function (BI-G) on a cross-sectional multiplanar reconstruction (CS-MPR) image, and the ratio of the BI to the BI-G (i.e., the “BI ratio”) for each lesion. The BI ratios of the Tis and T1 CRCs were compared. The BI ratios were significantly higher in the T1 CRCs than in the Tis CRCs (p

Early gastric cancer with ulceration (EGC-U) mimics advanced gastric cancer (AGC), as EGC-Us and ACGs often have similar endoscopic appearance to ulceration. The purpose of this retrospective study was to determine whether multiphasic dynamic multidetector CT (MDCT) can help differentiate EGC-Us from AGCs. Patients with EGC-Us with ulcer stages Ul-III or IV and AGCs with tumour stages T2 to T4a were enrolled. MDCT images were obtained 40 s (arterial phase), 70 s (portal phase) and 240 s (delayed phase) after injection of non-ionic contrast material. Two readers independently measured the attenuation values of the lesions by placing regions of interest. We compared the EGC-Us and AGCs using the mean attenuation values in each phase and peak enhancement phase. We analysed the diagnostic performance of CT for differentiating EGC-Us from AGCs. Forty cases (16 EGC-Us and 24 AGCs) were analysed. The mean attenuation values of the EGC-Us were significantly lower than those of the AGCs in both the arterial and portal phases (all p

Purpose To evaluate the diagnostic value of contrast-enhanced computed tomography gastrography (CE-CTG) to predict the histological type of gastric cancer. Materials and methods We analyzed 47 consecutive patients with resectable advanced gastric cancer preoperatively evaluated by multiphasic dynamic contrast-enhanced CT. Two radiologists independently reviewed the CT images and they determined the peak enhancement phase, and then measured the CT attenuation value of the gastric lesion for each phase. The histological types of gastric cancers were assigned to three groups as differentiated-type, undifferentiated-type, and mixed-type. We compared the peak enhancement phase of the three types and compared the CT attenuation values in each phase. Results The peak enhancement was significantly different between the three types of gastric cancers for both readers (reader 1, p = 0.001; reader 2, p = 0.009); most of the undifferentiated types had peak enhancement in the delayed phase. The CT attenuation values of undifferentiated type were significantly higher than those of differentiated or mixed type in the delayed phase according to both readers (reader 1, p = 0.002; reader 2, p = 0.004). Conclusion CE-CTG could provide helpful information in diagnosing the histological type of gastric cancers preoperatively.

We have developed a hybrid-type temperature sensor using thin-film transistors. First, we evaluate temperature dependences of transistor characteristics and find that the temperature dependence of the off-leakage current is much larger than that of the on current. Next, we combine a transistor, capacitor, and ring oscillator to develop the hybrid-type temperature sensor and detect the temperature by measuring the oscillation frequency. The large temperature dependences of the off-leakage currents can be utilized, and simultaneously only a digital circuit is required to count the digital pulse.

Purpose: The purpose of this study was to retrospectively assess the detectability and enhancement pattern of rectal carcinoid tumors on contrast-enhanced computed tomography colonography (CE-CTC). Methods: The study sample consisted of 12 lesions in nine patients of rectal carcinoid tumors. To evaluate the detectability, two radiologists reviewed axial and 3D images including air enema (AE), virtual endoscopy (VE), and virtual colon dissection (VCD). To determine the contrast enhancement pattern of the tumors, the CT attenuation value of each lesion was measured in three phases. Results: Four of the 12 lesions (33%) were detected on axial images in patients in both the prone and supine positions, the sizes of which were 6 mm or larger. Seven lesions (58%), including the four lesions mentioned above, were detected on 3D images including AE and VE in patients in the prone position, the sizes of which were 5 mm or larger. The ranges of CT attenuation values of the lesions at 40 s, 70 s and 240 s were 112 - 147, 116 - 140 and 82 - 97 HU, respectively. Conclusion: Rectal carcinoid tumors are challenging to detect on CE-CTC. They demonstrated enhancement at the early phase and washout at the delayed phase on CE-CTC.

SUMMARY Nonerosive reflux disease (NERD) is classified into grade M (minimal change, endoscopically; erythema without sharp demarcation, whitish turbidity, and/or invisibility of vessels due to these findings) and grade N (normal) in the modified Los Angeles classification system in Japan. However, the classification of grades M and N NERD is not included in the original Los Angeles system because interobserver agreement for the conventional endoscopic diagnosis of grades M or N NERD is poor. Flexible spectral imaging color enhancement (FICE) is a virtual chromoendoscopy technique that enhances mucosal and vascular visibility. The aim of this study is to evaluate whether the endoscopic diagnosis of grades M or N NERD using FICE images is feasible. Between April 2006 and May 2008, 26 NERD patients and 31 controls were enrolled in the present study. First, an experienced endoscopist assessed the color pattern of minimal change in FICE images using conventional endoscopic images and FICE images side-by-side and comparing the proportion of minimal change between the two groups. Second, three blinded endoscopists assessed the presence or absence of minimal change in both groups using conventional endoscopic images and FICE images separately. Intraobserver variability was compared using McNemar's test, and interobserver agreement was described using the kappa value. Minimal changes, such as erythema and whitish turbidity, which were detected using conventional endoscopic images, showed up as navy blue and pink-white, respectively, in color using FICE images in the present FICE mode. The NERD group had a higher proportion of minimal change, compared with the control group (77% and 48%, respectively) (P= 0.033). In all three readers, the detection rates of minimal change using FICE images were greater than those using conventional endoscopic images (P= 0.025

Two main technical obstacles must be overcome to build a fruitful business in the nascent flexible microelectronics industry: the self-heating effect of thin film transistors (TFTs), and the thermal and mechanical durability of flexible devices. The self-heating effect is controlled through TFT shape, TFT electrical performance, dimensional reductions, and energy-efficient circuits. Plastic engineering is one of the keys to solving thermal and mechanical durability problems faced by flexible microelectronics devices. Once these obstacles are cleared, TFT circuits on plastic will spawn a new industry and markets for plastic large-scale integrations.

“Suftla,” a technology that enables polycrystalline silicon thin film transistors to be transferred from one substrate to another, is on its way to commercialization. Realizing highly functional large-scale integrated circuits on plastic, Suftla is on the verge of creating a new industry of flexible microelectronics. for the flexible microelectronics business to be viable, Suftla transfer yield must be as high as possible. In addition, devices formed on plastic must not be damaged during the fabrication process and must be durable enough for practical uses. Plastic engineering is one of the keys to solving thermal reliability problems faced by flexible microelectronics devices.

A new technique of controlling the location and orientation of Si grain by combining metal-induced lateral crystallization (MILC) and excimer laser annealing (ELA) is proposed. A starting amorphous Si (a-Si) film is deposited on a SiO2 substrate having shallow pits. MILC is used to crystallize the a-Si film in a highly oriented polycrystal. ELA is used to recrystallize the highly oriented polycrystalline Si film. ELA produces large Si grains at the shallow pit sites because temperature gradient is generated by slanting Si surface on the slope of the pit. Si grains whose size is approximately 1.6 µm were formed at the pit sites. Electron backscatter diffraction pattern (EBSP) analysis showed that the crystal orientation aligned over the grain boundary.

A novel method of locating Si crystal grains by combining Ni imprint and excimer laser annealing (ELA) is demonstrated. Ni imprint is used for the purpose of creating Si crystal nuclei that act as the seed for the subsequent crystallization by ELA. Two Ni-imprint processes were investigated; (1) Ni imprint at the SiO2 substrate surface followed by the deposition of amorphous Si (a-Si), and (2) a-Si deposition on the SiO2 substrate followed by Ni imprint at the a-Si film surface. The annealing used to form nuclei at the imprinted sites was carried out at temperatures below 450 °C. XeCl-laser-based ELA of the sample thus prepared resulted in the formation of about 2 µm sized Si grains at the imprinted sites, whereas the grain consists of several sub-grains radially grown from the center of the grain. The application of Secco's etching to the location-controlled grains formed by Ni imprint at the SiO2 substrate delineated a cavity at the middle of the grain, whereas no cavity was observed in the grains formed by Ni imprint at the a-Si surface. Thus, Ni imprint at the a-Si surface produces higher-quality Si grains than Ni imprint at the SiO2 substrate surface. Details of the experimental conditions used to create the location-controlled grains are described.

Very thin (25–50-nm-thick) amorphous silicon (a-Si) films were crystallized into polycrystalline silicon (polysilicon) films by the combination of low temperature solid phase crystallization (SPC) and subsequent excimer laser annealing (ELA). These films are, then, subjected to a standard low temperature process (

Pelvic schwannoma typically forms a large, well-circumscribed mass in the retroperitoneum or presacral area and frequently undergoes cystic degeneration. It appears as a well-demarcated round or oval mass, often showing prominent cystic degeneration and calcification. Characteristics of these calcifications are punctate, mottled, or curvilinear and are seen along the walls of the mass. Herein, we describe a case of schwannoma presenting a huge pelvic mass with unique eggshell-like calcification.

The lateral crystallization of amorphous silicon thin films induced by nickel was studied in detail, performing in situ annealing experiments with a transmission electron microscope. The nickel-induced crystallization starts with the fast growth of thin needle-like crystallites of [110] orientation, which advance along the 〈111〉 directions within the film plane. The fast growth rate and the small probability of the crystallite exhibiting the [110] orientation result in large crystalline grains. These grains are, however, composed of many small misorientated subgrains. It is thought that this is because the needle-like crystallite does not grow continuously but grows by successive jumps. Our model is that after the nickel disilicide precipitate grows a thin crystalline slice epitaxially at the leading edge of the needle-like crystallite, the nickel moves to the new leading edge and forms the new nickel disilicide precipitates to maintain the needle-like crystalline growth.

The infralow‐pressure chemical vapor deposition (ILPCVD) system has been developed to reduce the partial pressure of silane (PSiH4) to the sub‐mTorr order by increasing the pumping speed, while aiming at the improvement of as‐deposited polycrystalline silicon (poly‐Si) film qualities. The films prepared by the system show better physical properties than ordinary low‐pressure chemical vapor deposition (LPCVD) films at fixed temperature (600 °C), so that the low‐temperature processed as‐deposited poly‐Si thin film transistors can be easily and significantly improved, having ON/OFF current ratios of more than 108. Physical analyses have confirmed that the films deposited at temperatures as low as 555 °C by the ILPCVD system are undoubtedly polycrystalline. The fabrication of poly‐Si TFT’s through a low‐temperature process confirms good semiconductive behavior of the films, even when deposited at 555 °C. The superiority of the ILPCVD over other LPCVD’s is explained by the deposition kinetics. The nature of LP...

Polycrystalline silicon (p-Si) thin film transistors (TFTs) were fabricated using a high temperature process that included solid phase crystallization (SPC) and dry thermal oxidation with excimer laser annealing (ELA). Raman spectroscopy, X-ray diffraction and transmission electron microscopy analyses showed that the ELA process improved the quality of p-Si films markedly. The p-Si TFTs exhibited higher performance than the SPC p-Si TFTs. The field effect mobility for n-type self-aligned TFT was (formula available in paper). The longitudinal junction diffusion length of the p-Si TFTs was shorter than that of the SPC p-Si TFTs. This is favorable for fine design rules. If optimization of amorphous silicon (a-Si) deposition and SPC conditions enables the grains of p-Si films to grow larger than the channel length and the positions of the grain boundaries are controlled, this process will produce great scaling rule merits such as single-grain Si TFTs. This fabrication process is consistent with the high temperature p-Si TFT development trend towards using large substrates, low temperatures, and fine design rules. High temperature p-Si TFTs are expected to be used in LSI circuits as silicon-on-insulator (SOI) devices in the future.

As-deposited polycrystalline silicon (poly-Si) films prepared by infra-low pressure chemical vapor deposition (ILPCVD) at surprisingly low temperatures, such as 555 degrees C or 570 degrees C, have been found to enable the fabrication of excellent poly-Si TFTs (thin-film transistors) having ON/OFF current ratios of nearly 10/sup 8/. While aiming at the improvement of low-temperature-processed poly-Si TFTs, the ILPCVD has been used to reduce the partial pressure of SiH/sub 4/ by increasing the pumping speed. This work reveals the great potential of ILPCVD for fabricating high-quality as-deposited poly-Si TFTs at a maximum processing temperature as low as 555 degrees C. >

As-deposited poly-crystalline silicon (poly-Si) films have been applied to low temperature processed complementary metal oxide semiconductor (CMOS) thin film transistors (TFTs). Continuous two-step deposition of poly-Si films in the infra-low pressure chemical vapor deposition (ILPCVD) reduces the silane partial pressure to 0.10 mTorr to obtain high quality films. The maximum processing temperature of 555° C through the CMOS TFT fabrication is during the poly-Si deposition. Since the as-deposited poly-Si films are good in quality, CMOS static shift registers have been successfully integrated on a glass substrate with the as-deposited poly-Si TFTs.

— A paper-thin QVGA, flexible 2.1-in. active-matrix electrophoretic display (AMEPD) that features 100-μm thick and a 192-ppi resolution has been developed. An LTPS-TFT backplane with integrated peripheral driver circuits was first fabricated on a glass substrate and then transferred to a very thin (30-μm) plastic film by employing surface-free technology by laser ablation/annealing (SUFTLA®). A micro-encapsulated electrophoretic imaging sheet was laminated on the backplane. A supporting substrate was used to support the LTPS-TFT backplane. Fine images were successfully displayed on the rollable AM-EPD. The integrated driver circuits dramatically reduce the number of external connection terminals, thus easily boosting the reliability of electrical connections even on such a thin plastic film.

— Suftla is a technology that is used to transfer polycrystalline silicon (polysilicon) thin-film-transistor (TFT) circuits from an original glass substrate to a plastic sheet. The electronic devices in the next generation will be thin, lightweight, and will handle huge amounts of data, yet consume less energy. Suftla technology, together with high-performance polysilicon TFTs, meets all these requirements because we have developed a variety of smart flexible electronic devices, such as thin paperback-sized displays and microprocessors. Suftla will usher in a new era of life-enhancing flexible microelectronics.

We have developed a flexible 7.1-inch Quad-XGA active-matrix electrophoretic display using SUFTLA™. The whole panel circuitry including 7.3-milion transistors was successfully transferred onto a plastic substrate without damage. Integrating both scan- and data-drivers made it possible that 3-mega pixels are controlled with only 40 signal terminals. The developed panel fulfills major requirements for e-paper including true flexibility, thinness and lightness.

A flexible 2-inch QVGA electrophoretic display was developed by combining a microencapsulated electrophoretic imaging layer and SUFTLA, a technology of transferring low-temperature polysilicon thin-film transistor arrays (LTPS-TFTs) from a sacrificial substrate onto another. The resultant display panel was able to successfully switch when held rigid and when being flexed. In addition, grayscale through spatial dithering was explored, as well as ways to adjust the graytones to optimal values. As a result, a good linearity of grayscale was obtained.

— Thin-film transistors (TFTs) are field-effect transistors that can be used to create large-scale-integrated (LSI) circuits. The combination of high-performance TFTs and transfer technology of the TFTs has the potential to foster the rise of a new flexible microelectronics industry. This paper discusses the current status of flexible microelectronics, using a TFT fingerprint sensor (FPS) as an example. Technology used in active-matrix displays can easily be applied to the TFT FPS. TFT technology should not be confined to the display industry; its use should be expanded into the semiconductor industry. With the result presented in this paper, we declare a new era of flexible microelectronics open.

Polycrystalline silicon (p-Si) thin-film transistors (TFTs) were fabricated using a high-temperature process that included solid-phase crystallization (SPC) and dry thermal oxidation with excimer laser annealing (ELA). X-ray diffraction and transmission electron microscopy analyses showed that the ELA process improved the quality of p-Si films markedly. The p-Si TFTs exhibited a higher performance than the SPC and a-Si+ELA p-Si TFTs. The field-effect mobility for n-type self-aligned TFTs was 251 cm2·V-1·s-1. The longitudinal junction diffusion length of the p-Si TFTs was shorter than that of the SPC p-Si TFTs. This is favorable for fine design rules. This fabrication process is consistent with the high-temperature-processed p-Si TFT development trend towards using large substrates, low temperatures, and fine design rules.

Dry thermal oxidation of polycrystalline silicon (p-Si) and amorphous silicon (a-Si) has been studied. An oxidation temperature of 1070°C is a break point, at which the oxidation time of one atomic layer is nearly equal to the stress relaxation time. Below the break point temperature, oxidation stress is not relaxed at the silicon-oxide interface, because the stress relaxation time is longer than the oxidation time of one atomic layer. The high oxidation stress, together with the presence of grains and grain-boundaries, makes the interface rough, resulting in poor electrical properties in p-Si thin film transistors (TFTs). It is, therefore, important for fabricating good TFTs that p-Si or a-Si films are oxidized under conditions such that the oxidation time of one atomic layer is longer than the stress relaxation time to relax the oxidation stress at the interface.

The effects of low-pressure chemical vapor deposition (LPCVD) conditions of silicon films on polycrystalline silicon (polysilicon) thin film transistors (TFTs) fabricated through a high temperature process are studied. An LPCVD amorphous film is not uniformly flat, but has its own structure consisting of many amorphous grains. The size of these amorphous grains changes in accordance with the deposition conditions, because the conditions change the film nucleation and growth rates. An amorphous film composed of large amorphous grains is converted into a polycrystalline film of large crystalline grains after crystallization in the solid phase during thermal oxidation. It is also found that an LPCVD amorphous film has two different phases, i.e., amorphous-I and amorphous-II. The amorphous-I is a well-known phase in which the amorphous grains grow in size as the deposition temperature falls. The amorphous-II is a newly found phase in which the amorphous grains decrease in size as the deposition temperature falls. The best amorphous film is obtained in the amorphous-I phase, being deposited under a condition of large mass transfer and slow surface reaction.

The effects of semiconductor thickness on poly-crystalline silicon (poly-Si) thin film transistors (TFTs) are studied. The small value of the threshold voltage (V th) appearing in thin film can improve the electrical properties of the corresponding TFTs. However, thin poly-Si film generally consists of small grains and contains many defects. When the film is extremely thin, it contains voids and it is in a separate island-like state. As a result, the extremely thin film possesses very many traps, which prevent the V th value from further decreasing. The way that thickness affects film quality differs according to how that film was prepared. Therefore, different TFT fabrication methods make the optimum semiconductor thickness different.

Stoichiometric change of underlying silicon oxide has been found to have a great influence upon the properties of thin poly-crystalline silicon (poly-Si) films deposited on an underlying silicon oxide, resulting in important characteristics changes of the poly-Si thin film transistors (TFTs) made on it. The silicon oxide containing excessive silicon atoms has fairly good wettability with silicon so that the thin poly-Si deposited on it is in a continuous film state even if it is as thin as 25 nm and is deposited under infra-low pressure. The thin poly-Si on the stoichiometricaly perfect silicon dioxide, on the other hand, is in a separate island-like state but consists of large crystallites. The best TFTs will be fabricated by optimizing the amount of silicon content in the underlying silicon oxide, the poly-Si deposition condition, and the thickness of poly-Si film.

This paper investigates the role of silane partial pressure (P SiH 4) in VLPCVD on the as-deposited poly-Si film quality. The film quality strongly depends on the P SiH 4 when deposition temperature is kept constant. Higher pressure and excessively lower pressure have been found to be not adequate for thin film transistors (TFTs). By optimizing the deposition conditions, excellent TFTs can be fabricated through a low temperature process without relying on any other special processes. This paper also suggests the possibility of further improvement of as-deposited poly-Si films.