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Since HfOx‐based ferroelectric tunnel junctions (FTJs) are attractive compared to perovskite‐based FTJs and other emerging memory devices, they are being actively studied recently. They have advantages such as a simple metal–insulator–metal structure, complementary metal oxide semiconductor (CMOS) compatibility, non‐destructive operation, and low power consumption. Moreover, doped HfOx‐based FTJs are in the spotlight in terms of neuromorphic engineering as a way of advancing from the von Neumann structure. In particular, Al dopant is effective for inducing ferroelectric properties due to its smaller radius than that of Hf. The optimal concentration of Al varies depending on the device materials and the annealing conditions during deposition. Therefore, in‐depth research is required for neuromorphic applications. Herein, the properties of FTJ devices according to Al doping concentrations are analyzed. Subsequently, using the device with the highest remanent polarization, neuromorphic applications are implemented, including spike‐timing‐dependent plasticity (STDP), paired‐pulse facilitation (PPF), long‐term potentiation, and depression. The characteristics in different frequency regions are also studied to satisfy the demand for fast switching. Finally, the FTJ device is used as a physical reservoir in reservoir computing for efficient processing of time‐dependent inputs. [ABSTRACT FROM AUTHOR]

In recent years, neuromorphic computing has been rapidly developed to overcome the limitations of von Neumann architecture. In this regard, the demand for high‐performance synaptic devices with high switching speeds, low power consumption, and multilevel conductance is increasing. Among the various synaptic devices, ferroelectric tunnel junctions (FTJs) are promising candidates. While previous studies have focused on improving reliability of FTJs to enhance the synaptic behavior, low‐frequency noise (LFN) of FTJs has not been characterized and its impact on the learning accuracy in neuromorphic computing remains unknown. Herein, the LFN characteristics of FTJs fabricated on n‐ and p‐type Si along with the impact of 1/f noise on the learning accuracy of convolutional neural networks (CNNs) are investigated. The results indicate that the FTJ on p‐type Si exhibits a far lower 1/f noise than that on n‐type Si. The FTJ on p‐type Si exhibits a significantly higher learning accuracy (86.26%) than that on n‐type Si (78.70%) owing to its low‐noise properties. This study provides valuable insights into the LFN characteristics of FTJs and a solution to improve the performance of synaptic devices by significantly reducing the 1/f noise. [ABSTRACT FROM AUTHOR]

In the last decade, a surge in research on hafnium oxide (HfOx)-based ferroelectricity has become a significant part of the semiconductor research trend. In this work, we present a new factor, that is, process damage to the HfOx-based ferroelectric implementation. By reversely exploiting harmful damage in the metal-oxide-semiconductor process, the ferroelectricity in HfOx is improved by eliciting early amorphization suitable for orthorhombic phase formation. In addition, through various pulsed polarization measurements, it is found that the damaged HfOx film has a fast polarization switching speed, with an initial pinning site that is suitable for domain wall growth motion; advantageous for high-performance memory applications. [ABSTRACT FROM AUTHOR]

Ever since the ferroelectricity of complementary metal-oxide semiconductor (CMOS) compatible HfO2-based materials was discovered, numerous studies have been conducted on their ferroelectric (FE) properties and device applications. In particular, pure-HfO2 FE materials without external doping have attracted considerable attention owing to their excellent robustness against variation because variations that appear in conventional doped-HfO2 FEs are not observed in electrical characteristics induced by dopant fluctuations in pure-HfO2 FEs. Studies on metal/FE/insulator/semiconductor (MFIS) stack are required to apply the ferroelectricity of pure-HfO2 to memory devices that are completely compatible with Si-based CMOS processes. In pure-HfO2 based MFIS stacks, the polarization tends to reduce with increasing thickness of the HfO2, although the leakage current diminishes. To overcome the tradeoff between the polarization and leakage current with respect to the thickness of the HfO2, an Al2O3 layer was inserted between the HfO2 layers to form a laminated FE structure. By employing the laminated FE, leakage current was effectively suppressed by the Al2O3 and lower HfO2 layers, and polarization was enhanced by the FE sum of the upper and lower HfO2 layers. Therefore, an MFIS structure with maximized polarization and minimized leakage current was successfully demonstrated using laminated FE. In addition, the feasibility of the proposed MFIS with laminated FE for nonvolatile memory device applications was confirmed by verifying the multistate operations of a FE tunnel junction. [ABSTRACT FROM AUTHOR]

It has been reported that the HfOx-based metal–ferroelectric–insulator–semiconductor (MFIS) stack is one of the most feasible structures for memory applications in ferroelectric devices. In addition, in MFIS stacks, the formation of a high-quality thin insulator is considered to be a crucial process, because it determines the device performance and reliability. In this study, the effects of different SiO2 thin interfacial layers (ILs) formed by chemical oxidation and atomic layer deposition (ALD) on the ferroelectricity of HfOx were investigated in MFIS stacks. Notably, the IL formation method affected the crystallization temperature of HfOx ferroelectricity. In particular, the chemical oxide IL sample was sufficiently crystallized only at an RTA temperature greater than 800 °C, whereas the ALD oxide IL sample began to undergo a complete ferroelectric phase transition from a low temperature (600 °C). The x-ray analysis verified that the IL formation method affected the initial film state of the HfOx layer by modulating the Hf-O bonding states, resulting in a different temperature dependence for ferroelectricity formation during the subsequent crystallization annealing stage. Consequently, it was confirmed that stable polarization (2Pr > 30 μC/cm2) could be obtained over a wide temperature range (600–800 °C) through IL material engineering; this could facilitate the integration of HfOx-based ferroelectric devices in terms of the heat budget and the application of ferroelectric devices as commercial devices. [ABSTRACT FROM AUTHOR]

Ferroelectric tunnel junction (FTJ) has been considered as a promising candidate for next-generation memory devices due to its non-destructive and low power operations. In this article, we demonstrate the interlayer (IL) engineering in the FTJs to boost device performances. Through the analysis on the material and electrical characteristics of the fabricated FTJs with engineered IL stacks, it is clearly found that the insertion of an Al2O3 layer between the SiO2 insulator and the pure-HfOx FE improves the read disturbance (2Vc = 2.2 V increased), the endurance characteristics (tenfold improvement), and the cell-to-cell TER variation simultaneously without the degradation of the ferroelectricity (less than 5%) and the polarization switching speeds through grain size modulation. Based on these investigations, the guidelines of IL engineering for low power ferroelectric devices were provided to obtain stable and fast memory operations. [ABSTRACT FROM AUTHOR]

As the computing paradigm has shifted toward edge computing, improving the security of edge devices is attracting significant attention. However, because edge devices have limited resources in terms of power and area, it is difficult to apply a conventional cryptography system to protect them. On the other hand, as a simple security application, a physical unclonable function (PUF) can be implemented without power and area problems because it provides a security key by utilizing process variations without additional external circuits. Ferroelectric tunnel junctions (FTJs) are 2-terminal devices that store information by changing the resistance of a ferroelectric material, where the resistance is determined by the polarization states of the ferroelectric domains. Because polycrystalline ferroelectric materials have a multi-domain nature, domain variation can also be used as a randomness source to induce cell-to-cell variations along with process variations. In this paper, we demonstrate PUF operations of a low-power, small area 16 × 16 hafnium oxide (pure-HfOx)-based FTJ array using certain metrics. It is clear that the proposed array consisting of scaled FTJs has adequate randomness for security applications such that the array-level PUF operations are robust against model-based machine learning attacks. [ABSTRACT FROM AUTHOR]

In this paper, we demonstrate retention improvement in nonvolatile charge-trapping memory cells by tunneling oxide engineering with Al2O3. By utilizing SiO2/Al2O3/SiO2 layers for the tunneling oxide, it is shown that the threshold voltage window after 10 years is significantly improved from 0.78 V to 4.18 V through Synopsys Sentaurus technology computer-aided design simulation. In addition, retention improvement from incorporating SiO2/Al2O3/SiO2 tunneling layers is compared with that using SiO2/Si3N4/SiO2 tunneling layers. The relationship between charge-trapping layer thickness and trapped charge emission is also investigated. As a result, we open up the possibility of using HfO2 as a charge-trapping layer with significant reliability enhancement. [ABSTRACT FROM AUTHOR]

In this article, we report a method for recovering a resistive-switching random access memory (RRAM) from the reset breakdown and enhancing the endurance characteristics. A SiNx-based RRAM device has been fabricated and its switching characteristics are analyzed with a particular interest in reset breakdown. It has been found that the SiNx RRAM in permanent reset breakdown can be revived to high-resistance state (HRS) by thermal recovery, a low-temperature annealing method. The memory window could be widened even with enhanced reset stability and conductance distribution. Temperature-dependent conductance change has been measured in order to figure out the substantial component of conductive filament and the mechanism of thermal recovery. The experimental evidences show that the reset breakdown process is the result of unwanted Si dangling bond (Si-DB) formation. By thermal recovery, Ni filament could be ruptured without applying a high electric field which induces negative set. [ABSTRACT FROM AUTHOR]

In this paper, we pose reverse leakage current issue which occurs when resistive random access memory (RRAM) is used as synapse for spiking neural networks (SNNs). To prevent this problem, 1 diode-1 RRAM (1D1R) synapse is suggested and simulated to examine their current rectifying chracteristics, Furthermore, high density of 1 K 3D 1D1R synapse array structure and its process flow are proposed.