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1. Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization

2. Adaptive Batch Size CGP: Improving Accuracy and Runtime for CGP Logic Optimization Flow

3. FinFET Technology

4. General Trade-Offs

6. Soft Error Mitigation

9. Evaluation Methodology

10. Introduction

13. Final Remarks

14. Process Variability Impact on the SET Response of FinFET Multi-level Design

15. Robust FinFET Schmitt Trigger Designs for Low Power Applications

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